HS7750KCI01H Renesas Electronics America, HS7750KCI01H Datasheet - Page 229

• Manufacturer Part Number: HS7750KCI01H
• Description: ON CHIP DEBUG EMULATOR
• Manufacturer: Renesas Electronics America

Specifications of HS7750KCI01H

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Notes: 1. The counter for performance measurement has 48 bits. A maximum of 2
Note: For details on window function and command-line syntax, refer to the on-line help
2. Interrupts
During user program execution or in command input wait state, any interrupt to the SH7750
can be used. Whether or not to process interrupts during user program execution or in
command input wait state can be specified.
2. When performance measurement conditions are canceled, the settings in the UBC
function.
When the ratio of the CPU clock to the bus clock is changed in the user program, it is
recommended to select method 2, above, to count the number of cycles.
The following shows examples to measure the performance of the user program by the
performance measurement function.
1. Measuring cache hit ratio
2. Measuring ratio of execution time in specified program area to total execution
10
can be measured. If a counter overflow occurs, the count becomes invalid.
are not guaranteed.
14
T = C x B / 24
Specify measurement channel 1 to count the cache misses (for data read and write)
and specify measurement channel 2 to count operand accesses (read and write) to
the cacheable area while the cache is enabled. Specify, with both the channels, the
measurement from the start to the end of user program execution.
With the above command settings, the cache miss count and the access count to the
cacheable area can be measured, and the cache hit ratio in the executed user
program can be obtained.
time
Specify measurement channel 1 to measure the elapsed cycle count from the start to
the end of user program execution. Specify measurement channel 2 to measure the
elapsed cycle count during execution from the specified start PC to the specified
end PC.
With both the channels, the total elapsed cycle and the elapsed cycle for the
specified program area can be measured, and the ratio of the execution time in the
specified program area to the total execution time can be obtained.
counts and 16.3-day cycles (when the CPU operating frequency is 200 MHz)
(T: Execution time; B: Time of one bus clock cycle; C: Count)
Rev. 2.0, 01/01, page 205 of 214
48
= 2.8 x