C8051F124-TB Silicon Laboratories Inc, C8051F124-TB Datasheet - Page 45
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C8051F124-TB
Manufacturer Part Number
C8051F124-TB
Description
BOARD PROTOTYPING W/C8051F124
Manufacturer
Silicon Laboratories Inc
Specifications of C8051F124-TB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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AD0/D0/P3.0
AD1/D1/P3.1
AD2/D2/P3.2
AD3/D3/P3.3
AD4/D4/P3.4
AD5/D5/P3.5
AD6/D6/P3.6
AD7/D7/P3.7
Name
P4.0
P4.1
P4.2
P4.3
P4.4
‘F120
‘F122
‘F124
‘F126
54
53
52
51
50
49
48
47
98
97
96
95
94
Pin Numbers
‘F121
‘F123
‘F125
‘F127
47
46
45
44
43
42
39
38
Table 4.1. Pin Definitions (Continued)
‘F130
‘F132
54
53
52
51
50
49
48
47
98
97
96
95
94
‘F131
‘F133
47
46
45
44
43
42
39
38
Rev. 1.4
D I/O Bit 0 External Memory Address/Data bus (Multi-
D I/O Port 3.1. See Port Input/Output section for com-
D I/O Port 3.2. See Port Input/Output section for com-
D I/O Port 3.3. See Port Input/Output section for com-
D I/O Port 3.4. See Port Input/Output section for com-
D I/O Port 3.5. See Port Input/Output section for com-
D I/O Port 3.6. See Port Input/Output section for com-
D I/O Port 3.7. See Port Input/Output section for com-
D I/O Port 4.0. See Port Input/Output section for com-
D I/O Port 4.1. See Port Input/Output section for com-
D I/O Port 4.2. See Port Input/Output section for com-
D I/O Port 4.3. See Port Input/Output section for com-
D I/O Port 4.4. See Port Input/Output section for com-
Type
C8051F120/1/2/3/4/5/6/7
plexed mode)
Bit 0 External Memory Data bus (Non-multi-
plexed mode)
Port 3.0
See Port Input/Output section for complete
description.
plete description.
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C8051F130/1/2/3
Description
45
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