KS8993F-EVAL Micrel Inc, KS8993F-EVAL Datasheet - Page 98

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KS8993F-EVAL

Manufacturer Part Number
KS8993F-EVAL
Description
EVAL KIT EXPERIMENTAL KS8993F
Manufacturer
Micrel Inc
Datasheet

Specifications of KS8993F-EVAL

Lead Free Status / RoHS Status
Not applicable / Not applicable
6.5
The reset circuit in
supply.
The reset circuit in
FPGA, etc),. At power-on-reset, R, C and D1 provide the necessary ramp rise time to reset the KS8993F device. The
RST_OUT_n from CPU/FPGA provides the warm reset after power up.
Micrel, Inc.
May 2006
Reset Circuit
Figure 26: Recommended Reset Circuit for interfacing with CPU/FPGA Reset Output
Figure 25
Figure 26
KS8993F
is recommended for powering up the KS8993F if reset is triggered only by the power
is recommended for applications where reset is driven by another device (e.g., CPU,
KS8993F
RST
Figure 25: Recommended Reset Circuit
RST
D1: 1N4148
D1
C 10uF
VCC
D1
98
R 10K
VCC
D2
D1, D2: 1N4148
R 10K
C 10uF
hbwhelp@micrel.com
RST_OUT_n
CPU/FPGA
or (408) 955-1690
M9999-052206
KS8993F/FL

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