KS8993F-EVAL Micrel Inc, KS8993F-EVAL Datasheet - Page 15

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KS8993F-EVAL

Manufacturer Part Number
KS8993F-EVAL
Description
EVAL KIT EXPERIMENTAL KS8993F
Manufacturer
Micrel Inc
Datasheet

Specifications of KS8993F-EVAL

Lead Free Status / RoHS Status
Not applicable / Not applicable
Micrel, Inc.
Pin #
93
94
95
96
97
98
99
100
May 2006
Pin Name
PRSEL0
MDC
MDIO
SPIQ
SCL
SDA
SPIS_N
PS1
Type
Ipd
Ipu
Ipu/O
Opu
Ipu/O
Ipu/O
Ipu
Ipd
Description
below to select the desired servicing. Note that this selection affects all
split transmit queue ports in the same way.
MII Management interface: clock input
MII Management interface: data input/output
Note: An external 4.7K pull up is needed on this pin when it is in use.
SPI slave mode: serial data output
See description in pin# (100, 101)
SPI slave mode / I2C slave mode: clock input
I2C master mode: clock output
See description in pin# (100, 101)
SPI slave mode: serial data input
I2C master/slave mode: serial data input/output
See description in pin# (100, 101)
SPI slave mode: chip select (active low)
See description in pin# (100, 101)
Serial bus configuration pins to select mode of access to KS8993F internal
(PRSEL,PRSEL0)
When SPIS_N is high, the KS8993F is deselected and SPIQ is held in
high impedance state.
A high-to-low transition is used to initiate SPI data transfer.
(0,0)
(0,1)
(1,0)
(1,1)
15
Description
Transmit all high priority before
low priority
Transmit high priority and low
priority at 10:1 ratio.
Transmit high priority and low
priority at 5:1 ratio.
Transmit high priority and low
priority at 2:1 ratio.
hbwhelp@micrel.com
or (408) 955-1690
M9999-052206
KS8993F/FL

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