KS8993F-EVAL Micrel Inc, KS8993F-EVAL Datasheet - Page 76

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KS8993F-EVAL

Manufacturer Part Number
KS8993F-EVAL
Description
EVAL KIT EXPERIMENTAL KS8993F
Manufacturer
Micrel Inc
Datasheet

Specifications of KS8993F-EVAL

Lead Free Status / RoHS Status
Not applicable / Not applicable
Registers 104 to 109 define the switching engine’s MAC address. This 48-bit address is used as the source address
for MAC pause control frames.
Register 104 (0x68): MAC Address Register 0
Register 105 (0x69): MAC Address Register 1
Register 106 (0x6A): MAC Address Register 2
Register 107 (0x6B): MAC Address Register 3
Register 108 (0x6C): MAC Address Register 4
Register 109 (0x6D): MAC Address Register 5
Use registers 110 and 111 to read or write data to the static MAC address table, VLAN table, dynamic MAC address
table, or the MIB counters.
Register 110 (0x6E): Indirect Access Control 0
Register 111 (0x6F): Indirect Access Control 1
Note: A write to reg. 111 will actually trigger a command. Read or write access will be decided by bit 4 of reg. 110.
Micrel, Inc.
Bit
7-0
Bit
7-0
Bit
7-0
Bit
7-0
Bit
7-0
Bit
7-0
Bit
7-5
4
3-2
1-0
Bit
7-0
May 2006
Name
MACA[47:40]
Name
MACA[39:32]
Name
MACA[31:24]
Name
MACA[23:16]
Name
MACA[15:8]
Name
MACA[7:0]
Name
Reserved
Read High
Write Low
Table select
Indirect
address high
Name
Indirect
address low
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Description
Description
Description
Description
Description
Description
Reserved
= 1, read cycle
= 0, write cycle
00 = static MAC address table selected
01 = VLAN table selected
10 = dynamic MAC address table selected
11 = MIB counter selected
Bit [9-8] of indirect address
Description
Bit [7-0] of indirect address
76
hbwhelp@micrel.com
or (408) 955-1690
Default
0x00
Default
0x10
Default
0xA1
Default
0xFF
Default
0xFF
Default
0xFF
Default
000
0
00
00
Default
0000_0000
M9999-052206
KS8993F/FL

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