EVAL-AD5390EB Analog Devices Inc, EVAL-AD5390EB Datasheet - Page 27

• Manufacturer Part Number: EVAL-AD5390EB
• Description: BOARD EVAL FOR AD5390
• Manufacturer: Analog Devices Inc

Specifications of EVAL-AD5390EB

• Number Of Dac's: 16
• Number Of Bits: 14
• Outputs And Type: 16, Single Ended
• Sampling Rate (per Second): 125k
• Data Interface: Serial
• Settling Time: 8µs
• Dac Type: Voltage
• Voltage Supply Source: Single
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: AD5390
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

I
There are three specific modes in which data can be written to
the AD539x family of DACs.
4-BYTE MODE
When writing to the AD539x DACs, begin with an address byte
(R/ W = 0), after which the DAC acknowledges that it is prepared
to receive data by pulling SDA low. The address byte is followed
by the pointer byte. This addresses the specific channel in the
SCL
SDA
SCL
SDA
2
C WRITE OPERATION
SCL
SDA
SCL
SDA
CONDITION
MASTER
START
CONDITION
BY
MASTER
START
BY
REG1
1
REG1
1
REG0
0
REG0
0
DB11
1
MOST SIGNIFICANT DATA BYTE
DB13
1
MOST SIGNIFICANT DATA BYTE
ADDRESS BYTE
DB10
0
ADDRESS BYTE
DB12
0
1
DB9
DB11
1
AD1
DB8
Figure 33. AD5390/AD5392 4-Byte Mode I
AD1
DB10
AD0
Figure 34. AD5391 4-Byte Mode I
DB7
AD0
DB9
R/W
DB6
CONVERTER
CONVERTER
R/W
DB8
CONVERTER
ACK
BY
Rev. C | Page 27 of 40
CONVERTER
ACK
BY
ACK
BY
ACK
BY
MSB
A/B
DB5
MSB
A/B
DB7
0
DB4
DAC to be addressed and is also acknowledged by the DAC.
Address Bits A3 to A0 address all channels on the AD5390/
AD5391. Address Bits A2 to A0 address all channels on the
AD5392. Address Bit A3 is a zero on the AD5392. Two bytes
of data are then written to the DAC, as shown in
A STOP condition follows. This lets the user update a single
channel within the AD539x at any time and requires four bytes
of data to be transferred from the master.
2
C Write Operation
0
DB6
LEAST SIGNIFICANT DATA BYTE
2
0
DB3
C Write Operation
POINTER BYTE
0
LEAST SIGNIFICANT DATA BYTE
DB5
0
POINTER BYTE
DB2
0
DB4
A3
DB1
A3
DB3
A2
DB0
AD5390/AD5391/AD5392
A2
DB2
A1
0
A1
DB1
A0
CONVERTER
CONVERTER
0
A0
CONVERTER
ACK
DB0
CONVERTER
ACK
BY
BY
ACK
ACK
BY
BY
CONDITION
MASTER
STOP
Figure 33
CONDITION
BY
MASTER
STOP
BY
.