EVAL-AD7476ACB Analog Devices Inc, EVAL-AD7476ACB Datasheet - Page 19
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EVAL-AD7476ACB
Manufacturer Part Number
EVAL-AD7476ACB
Description
BOARD EVAL FOR AD7476A
Manufacturer
Analog Devices Inc
Datasheet
1.EVAL-AD7476ACB.pdf
(28 pages)
Specifications of EVAL-AD7476ACB
Rohs Status
RoHS non-compliant
Number Of Adc's
1
Number Of Bits
12
Sampling Rate (per Second)
1M
Data Interface
Serial
Inputs Per Adc
1 Differential
Input Range
0 ~ 5.25 V
Power (typ) @ Conditions
17.5mW @ 1MSPS, 5 V
Voltage Supply Source
Single
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
AD7476A
Lead Free Status / Rohs Status
Not Compliant
When power supplies are first applied to the AD7476A/AD7477A/
AD7478A, the ADC can power up in either the power-down or
normal modes. Because of this, it is best to allow a dummy cycle
to elapse to ensure that the part is fully powered up before
attempting a valid conversion. Likewise, if it is intended to keep
the part in the power-down mode while not in use and the user
wishes the part to power up in power-down mode, the dummy
cycle can be used to ensure that the device is in power-down by
executing a cycle such as that shown in Figure 22. Once supplies
are applied to the AD7476A/AD7477A/AD7478A, the power-up
time is the same as that when powering up from the power-down
mode. It takes approximately 1 μs to power up fully if the part
powers up in normal mode. It is not necessary to wait 1 μs before
executing a dummy cycle to ensure the desired mode of operation.
SDATA
SCLK
CS
A
1
SDATA
SCLK
SDATA
SCLK
THE PART
BEGINS TO
POWER UP
CS
CS
INVALID DATA
1
10
1
Figure 21. Entering Power-Down Mode
2
12
Figure 22. Exiting Power-Down Mode
Figure 20. Normal Mode Operation
14
Rev. E | Page 19 of 28
16
VALID DATA
Instead, a dummy cycle can occur directly after power is
supplied to the ADC. If the first valid conversion is performed
directly after the dummy conversion, care must be taken to
ensure that an adequate acquisition time has been allowed. As
mentioned earlier, when powering up from the power-down
mode, the part returns to track upon the first SCLK edge
applied after the falling edge of CS . However, when the ADC
initially powers up after supplies are applied, the track-and-hold
is already in track. This means, assuming one has the facility to
monitor the ADC supply current, if the ADC powers up in the
desired mode of operation and thus a dummy cycle is not
required to change the mode, a dummy cycle is not required to
place the track-and-hold into track.
10
10
THREE-STATE
12
12
AD7476A/AD7477A/AD7478A
1
14
14
THE PART IS FULLY
POWERED UP WITH
V
IN
FULLY ACQUIRED
16
16
AD7476A/AD7477A/AD7478A
VALID DATA
16