PMF18WD1 Microchip Technology, PMF18WD1 Datasheet - Page 92
![PROCESSOR MODULE FOR ICE4000](/photos/26/90/269011/processormodule-ice4000_general_sml.jpg)
PMF18WD1
Manufacturer Part Number
PMF18WD1
Description
PROCESSOR MODULE FOR ICE4000
Manufacturer
Microchip Technology
Datasheet
1.ICE4000.pdf
(98 pages)
Specifications of PMF18WD1
Module/board Type
Processor Module
Product
Microcontroller Modules
Core Processor
PIC18F1310 and PIC18F1320
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
ICE4000
For Use With
ICE4000 - EMULATOR MPLAB-ICE 4000 POD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
MPLAB
DS51490A-page 86
ICE 4000 User’s Guide
SFR
See Special Function Registers.
Shell
The MPASM assembler shell is a prompted input interface to the macro assembler.
There are two MPASM assembler shells: one for the DOS version and one for the
Windows version.
Simulator
A software program that models the operation of devices.
Single Step
This command steps though code, one instruction at a time. After each instruction,
MPLAB IDE updates register windows, watch variables and status displays so you can
analyze and debug instruction execution. You can also single step C compiler source
code, but instead of executing single instructions, MPLAB IDE will execute all assembly
level instructions generated by the line of the high level C statement.
Skew
The information associated with the execution of an instruction appears on the
processor bus at different times. For example, the executed Opcodes appears on the
bus as a fetch during the execution of the previous instruction, the source data address
and value and the destination data address appear when the Opcodes is actually
executed, and the destination data value appears when the next instruction is
executed. The trace buffer captures the information that is on the bus at one instance.
Therefore, one trace buffer entry will contain execution information for three
instructions. The number of captured cycles from one piece of information to another
for a single instruction execution is referred to as the skew.
Skid
When a hardware breakpoint is used to halt the processor, one or more additional
instructions may be executed before the processor halts. The number of extra
instructions executed after the intended breakpoint is referred to as the skid.
Source Code
The form in which a computer program is written by the programmer. Source code is
written in some formal programming language which can be translated into or machine
code or executed by an interpreter.
Source File
An ASCII text file containing source code.
Special Function Registers
The portion of data memory (RAM) dedicated to registers that control I/O processor
functions, I/O status, timers, or other modes or peripherals.
Stack, Hardware
Locations in PICmicro microcontroller where the return address is stored when a
function call is made.
Stack, Software
Memory used by an application for storing return addresses, function parameters and
local variables. This memory is typically managed by the compiler when developing
code in a high-level language.
Static RAM or SRAM
Static Random Access Memory. Program memory you can Read/Write on the target
board that does not need refreshing frequently.
2004 Microchip Technology Inc.