PMF18WD1 Microchip Technology, PMF18WD1 Datasheet - Page 71
![PROCESSOR MODULE FOR ICE4000](/photos/26/90/269011/processormodule-ice4000_general_sml.jpg)
PMF18WD1
Manufacturer Part Number
PMF18WD1
Description
PROCESSOR MODULE FOR ICE4000
Manufacturer
Microchip Technology
Datasheet
1.ICE4000.pdf
(98 pages)
Specifications of PMF18WD1
Module/board Type
Processor Module
Product
Microcontroller Modules
Core Processor
PIC18F1310 and PIC18F1320
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
ICE4000
For Use With
ICE4000 - EMULATOR MPLAB-ICE 4000 POD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
8.16
2004 Microchip Technology Inc.
SETTINGS DIALOG, BREAK OPTIONS TAB
Set up options for halting/resetting the processor (device). Other options may be
available, depending on device selected.
TABLE 8-11:
General
Global Hardware Break
Enable
Freeze Peripherals on
Halt
Stack Full/Underflow Operation When Enabled
Stack Reset
Disable Stack
Full/Underflow Warning
Reset On Full/Underflow
Break On Full/Underflow
Watchdog Timer Operation When Enabled
WDT
Reset On Overflow
Break On Overflow
Enable Warning on WDT
Expiration Break
BREAK OPTIONS TAB
When selected, enables all hardware breakpoints. When not
selected, all hardware breakpoints are disabled.
This option freezes peripherals (timers, ports, PWM, etc.) on a halt
operation. By default, this option is on so that you will get a true
picture of the status.
When Freeze Peripherals on Halt is on, you can write to a port
after a halt, but you cannot read from the port until you perform a
single-step. You may wish to turn this option off if a peripheral must
continue to run after a halt. This option facilitates troubleshooting
of timers in situations when timers are continuing to get set/reset
and cleared after a halt.
Note: If Freeze Peripherals On Halt is selected, the I/O port bits in
the SFR or the watch windows will not update when single
stepping.
Display whether or not stack reset is enabled in the configuration
bits.
When selected, the stack full/underflow warning message is
disabled. However, the halt or break on this condition is not
disabled.
When selected, causes the processor to reset as soon as a stack
full or underflow occurs. If you do not wish to reset the processor
specifically for a stack full or underflow, clear this switch.
When selected, causes the processor to halt as soon as a stack
full or underflow occurs. If you do not wish to stop processing
specifically for a stack full or underflow, clear this switch.
Display whether or not watchdog timer is enabled in the
configuration bits.
When selected, resets the processor when the watchdog timer
times out.
When selected, halts the processor when the watchdog timer
times out.
Check to enable the display of a Warning message when the WDT
times-out and breaks your code execution. Uncheck to not display
this message.
Emulator Function Summary
DS51490A-page 65