MPC8308-RDB Freescale Semiconductor, MPC8308-RDB Datasheet - Page 11

• Manufacturer Part Number: MPC8308-RDB
• Description: BOARD REF DESIGN MPC8308
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC II™ PROr
• Type: MPUr

Specifications of MPC8308-RDB

• Contents: Board, Cables, Documentation, Power Supply, Software
• Ethernet Connection Type: Serial to Ethernet
• Data Rate: 10 Mbps, 100 Mbps, 1000 Mbps
• Memory Type: DDR2, SDRAM
• Interface Type: HSSI
• Operating Voltage: 1.5 V
• Operating Current: 5 uA
• Maximum Power Dissipation: 1000 mW
• Operating Temperature Range: - 55 C to + 125 C
• Product: Modules
• For Use With/related Products: MPC8308
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2.4
The MPC8308 processor uses DDR2 SDRAM as the system memory. The DDR2 interface uses the SSTL2
driver/receiver and 1.8 V power. A Vref 1.8 V /2 is needed for all SSTL2 receivers in the DDR2 interface.
For details on DDR2 timing design and termination, refer to the Freescale application note entitled
Hardware and Layout Design Considerations for DDR Memory Interfaces (AN2582). Signal integrity test
results show this design does not require terminating resistors (series resistor (R
(R
MPC8308 are connected directly. The interface is 1.8 V provided by an on-board voltage regulator. VREF,
which is half the interface voltage, that is, 0.9 V, is provided by a voltage divider of the 1.8 V for voltage
tracking and low cost. One pair of clock pins is provided by the MPC8308, and they are connected and
shared by the two DDR2 devices.
Micetek International Inc.
33.333 MHz
133 MHz
25 MHz
125 MHz
125 MHz
100 MHz
50 MHz
24 MHz
32.768kHz
32.768kHz
Clock Frequency
T
)) for the discrete DDR2 devices used. DDR2 supports on-die termination; the DDR2 chips and
DDR2 SDRAM Controller
MPC8308 CLKIN
DDR2 SDRAM
L2 Switch and GBE PHY
eTSEC1 clock
eTSEC2 clock
PCIe/SERDES
IEEE1588 Clock (TMR_CLK)
ULPI external USB PHY
MCU MC9S08
RTC DS1339
Module
PowerQUICC™ MPC8308_RDB User’s Guide, Rev. 3
Figure 6
Table 2. Clock Distribution
shows the DDR2 SDRAM controller connection.
33.333 MHz oscillator
MPC8308
25 MHz oscillator
125 MHz oscillator
(default)
or RTL8211B (optional)
125 MHz oscillator
PCIe Clock Generator
50 MHz oscillator/ 50
MHz VCXO
24 MHz crystal
32.768kHz Crystal
32.768kHz Crystal
Generated by
The MPC8308 uses CLKIN to generate the
internal system PLL. The CSB clock is
generated by the internal PLL and is fed to the
e300 core PLL for generating the e300 core
clock.
The DDR memory controller is configured to use
the 2:1 mode CSB to DDR for the DDR interface
(DDR266). The local bus clock uses 1:1 local to
CSB clock, which is configured by hard reset
configuration or SPMR register.
The 25 MHz oscillator provides the clock for the
L2 switch and the GBE PHY
The eTSEC1 reference clock is provided by
a125MHz oscillator or optionally by the gigabit
Ethernet PHY (RTL8211B) on the board.
The eTSEC2 reference clock is provided by a
125MHz oscillator.
The PCIe Clock Generator provides differential
clock for PCIe/SERDES module and the PCIe &
mini PCIe slots
50 MHz is used by the IEEE 1588 module. It can
be an ordinary oscillator or VCXO controlled by
SPI DAC.
Clock for ULPI USB PHY USB3300
Clock for MCU
Clock for RTC
S
Description
) and termination resistor
Board-Level Functions
11