C8051F360-TB Silicon Laboratories Inc, C8051F360-TB Datasheet - Page 197

• Manufacturer Part Number: C8051F360-TB
• Description: BOARD TARGET/PROTO W/C8051F360
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F360-TB

• Contents: Board
• Processor To Be Evaluated: C8051F36x
• Interface Type: USB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: C8051F360
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1412

Bits 7–0: P2SKIP[7:0]: Port2 Crossbar Skip Enable Bits.
Bits 7–0: P2MAT[7:0]: Port2 Match Value.
Bits 7–0: P2MASK[7:0]: Port2 Mask Value.
SFR Page:
SFR Address:
SFR Page:
SFR Address:
SFR Page:
SFR Address:
R/W
R/W
R/W
Bit7
Bit7
Bit7
These bits select Port pins to be skipped by the Crossbar Decoder. Port pins used as ana-
log inputs (for ADC or Comparator) or used as special functions (V
lator circuit, CNVSTR input) should be skipped by the Crossbar.
0: Corresponding P2.n pin is not skipped by the Crossbar.
1: Corresponding P2.n pin is skipped by the Crossbar.
These bits control the value that unmasked P2 Port pins are compared against. A Port
Match event is generated if (P2 & P2MASK) does not equal (P2MAT & P2MASK).
These bits select which Port pins will be compared to the value stored in P2MAT.
0: Corresponding P2.n pin is ignored and cannot cause a Port Match event.
1: Corresponding P2.n pin is compared to the corresponding bit in P2MAT.
F
0xD6
0
0xB1
0
0xB2
R/W
R/W
R/W
Bit6
Bit6
Bit6
SFR Definition 17.20.
SFR Definition 17.19. P2MAT: Port2 Match
SFR Definition 17.18. P2SKIP: Port2 Skip
R/W
R/W
R/W
Bit5
Bit5
Bit5
R/W
R/W
R/W
Bit4
Bit4
Bit4
C8051F360/1/2/3/4/5/6/7/8/9
Rev. 1.0
R/W
R/W
R/W
Bit3
Bit3
Bit3
P2MASK: Port2 Mask
R/W
R/W
R/W
Bit2
Bit2
Bit2
R/W
R/W
R/W
Bit1
Bit1
Bit1
REF
input, external oscil-
R/W
R/W
Bit0
Bit0
R/W
Bit0
00000000
Reset Value
Reset Value
00000000
Reset Value
11111111
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