C8051F360-TB Silicon Laboratories Inc, C8051F360-TB Datasheet - Page 189

• Manufacturer Part Number: C8051F360-TB
• Description: BOARD TARGET/PROTO W/C8051F360
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F360-TB

• Contents: Board
• Processor To Be Evaluated: C8051F36x
• Interface Type: USB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: C8051F360
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1412

Bit 7:
Bit 6:
Bit 5:
Bit 4:
Bit 3:
Bits 2–0: PCA0ME: PCA Module I/O Enable Bits.
SFR Page:
SFR Address:
WEAKPUD XBARE
R/W
Bit7
WEAKPUD: Port I/O Weak Pullup Disable.
0: Weak Pullups enabled (except for Ports whose I/O are configured as analog input).
1: Weak Pullups disabled.
XBARE: Crossbar Enable.
0: Crossbar disabled.
1: Crossbar enabled.
T1E: T1 Enable
0: T1 unavailable at Port pin.
1: T1 routed to Port pin.
T0E: T0 Enable
0: T0 unavailable at Port pin.
1: T0 routed to Port pin.
ECIE: PCA0 External Counter Input Enable
0: ECI unavailable at Port pin.
1: ECI routed to Port pin.
000: All PCA I/O unavailable at Port pins.
001: CEX0 routed to Port pin.
010: CEX0, CEX1 routed to Port pins.
011: CEX0, CEX1, CEX2 routed to Port pins.
100: CEX0, CEX1, CEX2, CEX3 routed to Port pins.
101: CEX0, CEX1, CEX2, CEX3, CEX4 routed to Port pins.
110: CEX0, CEX1, CEX2, CEX3, CEX4, CEX5 routed to Port pins.
111: Reserved.
F
0xE2
SFR Definition 17.2. XBR1: Port I/O Crossbar Register 1
R/W
Bit6
T1E
R/W
Bit5
T0E
R/W
Bit4
C8051F360/1/2/3/4/5/6/7/8/9
Rev. 1.0
ECIE
R/W
Bit3
R/W
Bit2
PCA0ME
R/W
Bit1
R/W
Bit0
00000000
Reset Value
189