DK-DEV-4SE530N Altera, DK-DEV-4SE530N Datasheet - Page 38
![KIT DEV STRATIX IV FPGA 4SE530](/photos/28/41/284157/dk-dev-4se530n_sml.jpg)
DK-DEV-4SE530N
Manufacturer Part Number
DK-DEV-4SE530N
Description
KIT DEV STRATIX IV FPGA 4SE530
Manufacturer
Altera
Series
Stratix® IVr
Type
FPGAr
Datasheet
1.DK-DEV-4SE530N.pdf
(54 pages)
Specifications of DK-DEV-4SE530N
Contents
Board, Cables, CD, DVD, Power Supply
Silicon Manufacturer
Altera
Core Architecture
FPGA
Core Sub-architecture
Stratix
Silicon Core Number
EP4S
Silicon Family Name
Stratix IV E
Rohs Compliant
Yes
For Use With/related Products
EP4SE530
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2605
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
6–12
Figure 6–6. The QDRII+ Tab
Stratix IV E FPGA Development Kit User Guide
The following sections describe the controls on the QDRII+ tab.
Start
The Start control initiates QDR II+ memory transaction performance analysis.
Stop
The Stop control terminates transaction performance analysis.
Performance Indicators
These controls display current transaction performance analysis information collected
since you last clicked Start:
■
Write and Read performance bars—Show the percentage of maximum theoretical
data rate that the requested transactions are able to achieve.
© May 2010 Altera Corporation
Chapter 6: Board Test System
Using the Board Test System