DK-DEV-4SE530N Altera, DK-DEV-4SE530N Datasheet - Page 21

• Manufacturer Part Number: DK-DEV-4SE530N
• Description: KIT DEV STRATIX IV FPGA 4SE530
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-DEV-4SE530N

• Contents: Board, Cables, CD, DVD, Power Supply
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV E
• Rohs Compliant: Yes
• For Use With/related Products: EP4SE530
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2605

Chapter 4: Development Board Setup
Factory Default Switch Settings
Table 4–3. SW4 Dip Switch Settings (Part 2 of 2)
Table 4–4. Jumper Settings (Part 1 of 2)
© May 2010 Altera Corporation
3
4
5
6
7
8
J2
J4
J5
Switch
Reference
Board
USER_DIPSW2
USER_DIPSW3
USER_DIPSW4
USER_DIPSW5
USER_DIPSW6
USER_DIPSW7
MSEL0
USB DISABLE
HSMB_JTAG_EN
Board
Label
Board
Label
5. Set the board jumpers to match
c
Switch 3 is a user-defined switch and has the following options:
■
■
Switch 4 is a user-defined switch and has the following options:
■
■
Switch 5 is a user-defined switch and has the following options:
■
■
Switch 6 is a user-defined switch and has the following options:
■
■
Switch 7 is a user-defined switch and has the following options:
■
■
Switch 8 is a user-defined switch and has the following options:
■
■
When closed, a logic 0 is selected.
When open, a logic 1 is selected.
When closed, a logic 0 is selected.
When open, a logic 1 is selected.
When closed, a logic 0 is selected.
When open, a logic 1 is selected.
When closed, a logic 0 is selected.
When open, a logic 1 is selected.
When closed, a logic 0 is selected.
When open, a logic 1 is selected.
When closed, a logic 0 is selected.
When open, a logic 1 is selected.
Installing shunts in certain configurations might cause damage to devices
on your board. Pay specific attention to the Function column details.
The MSEL0 jumper has the following options:
■
■
The USB disable jumper has the following options:
■
■
The HSMC port B JTAG enable jumper has the following options:
■
■
Installing the shunt sets MSEL0 to logic 0.
Removing the shunt sets MSEL0 to logic 1.
Installing the shunt disables the onboard USB-Blaster.
Removing the shunt enables the onboard USB-Blaster.
Installing the shunt includes HSMC port B in the JTAG chain.
Removing the shunt removes HSMC port B from the JTAG chain.
Table
Function
Function
4–4,
Figure
4–1, and
Stratix IV E FPGA Development Kit User Guide
Figure
4–2.
Shunt Position
Not installed
Not installed
Installed
Default
Position
Default
Closed
Closed
Closed
Closed
Open
Open
4–5