C8051F326DK Silicon Laboratories Inc, C8051F326DK Datasheet - Page 17

KIT DEV FOR C8051F326/7

C8051F326DK

Manufacturer Part Number
C8051F326DK
Description
KIT DEV FOR C8051F326/7
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F326DK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F326/F327
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F326
Silicon Family Name
C8051F32x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
Silicon Laboratories C8051F326, C8051F327
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1306
1.1.
1.1.1. Fully 8051 Compatible
The C8051F326/7 family utilizes Silicon Laboratories' proprietary CIP-51 microcontroller core. The CIP-51
is fully compatible with the MCS-51™ instruction set; standard 803x/805x assemblers and compilers can
be used to develop software. The CIP-51 core offers all the peripherals included with a standard 8052,
including two 16-bit counter/timers, a full-duplex UART with extended baud rate configuration, 1536 bytes
of on-chip RAM, 128 byte Special Function Register (SFR) address space, and 15 I/O pins.
1.1.2. Improved Throughput
The CIP-51 employs a pipelined architecture that greatly increases its instruction throughput over the stan-
dard 8051 architecture. In a standard 8051, all instructions except for MUL and DIV take 12 or 24 system
clock cycles to execute with a maximum system clock of 12-to-24 MHz. By contrast, the CIP-51 core exe-
cutes 70% of its instructions in one or two system clock cycles, with only four instructions taking more than
four system clock cycles.
The CIP-51 has a total of 109 instructions. The table below shows the total number of instructions that
require each execution time.
With the CIP-51's maximum system clock at 25 MHz, it has a peak throughput of 25 MIPS. Figure 1.5
shows a comparison of peak throughputs for various 8-bit microcontroller cores with their maximum sys-
tem clocks.
Number of Instructions
Clocks to Execute
CIP-51™ Microcontroller Core
Figure 1.5. Comparison of Peak MCU Execution Speeds
25
20
15
10
5
26
(25 MHz clk)
Silicon Labs
1
CIP-51
50
2
(33 MHz clk)
PIC17C75x
Microchip
2/3
Rev. 1.1
5
14
3
(33 MHz clk)
Philips
80C51
3/4
7
(16 MHz clk)
4
3
ADuC812
8051
C8051F326/7
4/5
1
5
2
8
1
17

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