PIC16F690DM-PCTLHS Microchip Technology, PIC16F690DM-PCTLHS Datasheet - Page 64

BOARD DEMO PICTAIL HUMIDITY SNSR

PIC16F690DM-PCTLHS

Manufacturer Part Number
PIC16F690DM-PCTLHS
Description
BOARD DEMO PICTAIL HUMIDITY SNSR
Manufacturer
Microchip Technology
Series
PICtail™r

Specifications of PIC16F690DM-PCTLHS

Sensor Type
Humidity
Sensing Range
1 ~ 99% RH
Interface
Analog
Voltage - Supply
5V
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
MCP6291, PIC16F690
Processor To Be Evaluated
MCP6291 and PIC16F690
Interface Type
ICSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162061 - HEADER INTRFC MPLAB ICD2 20PIN
Sensitivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
PIC16F631/677/685/687/689/690
REGISTER 4-5:
REGISTER 4-6:
DS41262E-page 62
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-4
bit 3
bit 2-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-0
Note 1:
U-0
U-0
2:
3:
4:
2:
Global RABPU bit of the OPTION register must be enabled for individual pull-ups to be enabled.
The weak pull-up device is automatically disabled if the pin is in Output mode (TRISA = 0).
The RA3 pull-up is enabled when configured as MCLR and disabled as an I/O in the Configuration Word.
WPUA<5:4> always reads ‘1’ in XT, HS and LP Oscillator modes.
Global Interrupt Enable (GIE) must be enabled for individual interrupts to be recognized.
IOCA<5:4> always reads ‘1’ in XT, HS and LP Oscillator modes.
Unimplemented: Read as ‘0’
WPUA<5:4>: Weak Pull-up Register bit
1 = Pull-up enabled
0 = Pull-up disabled
Unimplemented: Read as ‘0’
WPUA<2:0>: Weak Pull-up Register bit
1 = Pull-up enabled
0 = Pull-up disabled
Unimplemented: Read as ‘0’
IOCA<5:0>: Interrupt-on-change PORTA Control bit
1 = Interrupt-on-change enabled
0 = Interrupt-on-change disabled
U-0
U-0
WPUA: PORTA REGISTER
IOCA: INTERRUPT-ON-CHANGE PORTA REGISTER
W = Writable bit
W = Writable bit
‘1’ = Bit is set
‘1’ = Bit is set
WPUA5
IOCA5
R/W-1
R/W-0
WPUA4
IOCA4
R/W-1
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
IOCA3
R/W-0
U-0
WPUA2
IOCA2
R/W-1
R/W-0
© 2008 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
WPUA1
IOCA1
R/W-1
R/W-0
WPUA0
IOCA0
R/W-1
R/W-0
bit 0
bit 0

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