LP5521TMEV National Semiconductor, LP5521TMEV Datasheet - Page 28

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LP5521TMEV

Manufacturer Part Number
LP5521TMEV
Description
EVAL BOARD FOR LP5521
Manufacturer
National Semiconductor
Datasheets

Specifications of LP5521TMEV

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
Q5109809
www.national.com
Program Load and Execution Example
Startup Device and Configure Device to SRAM Write Mode:
Program Load to SRAM (see figure below):
Enable Powersave, charge pump automatic mode (1x / 1.5x) and use external 32 kHz clock:
Run program:
LP5521 will generate 1100 ms long LED pattern which will be repeated infinitely. LED pattern is illustrated on the figure below.
Supply e.g. 3.6V to VDD
Supply e.g. 1.8V to EN
Generate 32 kHz clock to CLK_32K pin
Write to address 00H 0100 0000b (enable LP5521)
Wait 500 μs (start-up delay)
Write to address 01H 0001 0000b (Configure R channel into "Load program to SRAM" mode)
Write to address 10H 0000 0011b (1st ramp command 8 MSB)
Write to address 11H 0111 1111b (1st ramp command 8 LSB)
Write to address 12H 0100 1101b (1st wait command 8 MSB)
Write to address 13H 0000 0000b (1st wait command 8 LSB)
Write to address 14H 0000 0011b (2nd ramp command 8 MSB)
Write to address 15H 1111 1111b (2nd ramp command 8 LSB)
Write to address 16H 0110 0000b (2nd wait command 8 MSB)
Write to address 17H 0000 0000b (2nd wait command 8 LSB)
Write to address 08H 0011 1000b
Write to address 01H 0010 0000b (Configure LED controller operation mode to "Run program" in R channel
Write to address 00H 0110 0000b (Configure program execution mode from "Hold" to "Run" in R channel
Sequence diagram
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