ADC08D1500DEV/NOPB National Semiconductor, ADC08D1500DEV/NOPB Datasheet - Page 4

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ADC08D1500DEV/NOPB

Manufacturer Part Number
ADC08D1500DEV/NOPB
Description
BOARD DEV FOR ADC08D1500
Manufacturer
National Semiconductor
Series
PowerWise®r

Specifications of ADC08D1500DEV/NOPB

Mfg Application Notes
Clocking High-Speed A/D Converters AppNote
Number Of Adc's
2
Number Of Bits
8
Sampling Rate (per Second)
1.5G
Data Interface
Serial
Inputs Per Adc
1 Differential
Input Range
870 mVpp
Power (typ) @ Conditions
1.8W @ 1.5GSPS
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
ADC08D1500
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ADC08D1500DEV

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADC08D1500DEV/NOPB
Manufacturer:
ELNA
Quantity:
30 000
3.0 Quick Start
Refer to Figure 1 for locations of the power
connection, signal input and USB port.
IMPORTANT NOTE:
Install the Wavevision 4 Software before
connecting this product to the PC. See
Appendix B – Installing Wavevision.
For quick start operation:
1. Connect
2. Connect a stable sine wave source capable
3
5. Push the Power Switch to the ON position
6. Start the Wavevision 4 Software
7. Once loaded the “Firmware Download”
8. Upon Firmware Download completion, the
8. Set the signal source for the analog input to
9. Reduce the input level until the OVR LED
10. From the Wavevision 4 pull-down menu
11. For FFT Analysis click the FFT Tab.
4.0 Functional Description
The
schematic is shown in Section 7.0.
(included with the development board) to the
rear Power Connector labeled (8-12V DC).
of supplying the desired input frequencies at
up to 8 dBm. Connect this signal to the front
panel SMA connector labeled “I CH.”
through a band pass filter. The exact level
needed from the generator will depend upon
the insertion loss of the filter used.
Connect the USB cable (included) from the
USB port to the PC. If this is the first time
the board has been connected, Windows
may install the drivers for this product at this
time.
on the rear panel and check that the Green
LED between the switch and the power
connector illuminates.
Progress bar should be displayed. See
Appendix B for more information.
control
automatically be displayed on the PC and
the CLK LED on the front panel should be
flashing.
8 dBm at the desired frequency. Observe
the Out of Range LED labeled OVR on the
front panel is illuminated. If this LED is not
on, increase the input signal source until it
is.
just turns off.
select Acquire and then Samples. The
system will then capture the input waveform
and display the results in the time domain.
ADC08D1500
panel
the
12V
for
Development
DC
the
power
board
source
should
Board
4.1 Input circuitry
The input signal(s) to be digitized should be
applied to the front panel SMA connectors
labeled “I CH.” and “Q CH.”. These 50 Ohm
inputs are intended to accept low-noise sine
wave signals. To accurately evaluate the
dynamic performance of this converter, the input
test signals will have to be passed through a
high-quality bandpass filter with at least 10-bit
equivalent noise and distortion characteristics.
This evaluation board as delivered is set up for
operation with two single-ended analog inputs,
which are converted to differential signals on
board.
Signal transformers T2 and T3, are connected
as baluns, and provide the single-ended to
differential conversion. The differential PCB
traces to the ADC analog input pins have a
characteristic differential impedance of 100
Ohms.
No scope or other test equipment should be
connected anywhere in the signal path while
gathering data.
4.2 ADC reference
The ADC08D1500 has an internal reference that
can not be adjusted. However, the Full-Scale
(differential) Range may adjusted with the
Software Control Panel Refer to Section 9.0 for
more information
4.3 ADC clock
The ADC clock is supplied on board and is fixed
at 1.5GHz. An external clock signal may be
applied to the ADC through the SMA Connector
labeled “CLOCK” on the front panel. The balun-
transformer (T1) converts the single ended clock
source to a differential signal to drive the ADC
clock pins
Note that it is very important that the ADC clock
should be as free of jitter as possible or the
apparent SNR of the ADC08D1500 will be
compromised.
4.4 Digital Data Output
The two channel digital output data from the
ADC08D1500 is connected to a Xilinx Virtex 4
FPGA. Up to 4K Bytes of data per channel can
be stored and then uploaded over the USB
interface to the Wavevision 4 software. The
FPGA logic usage is low allowing further code to
be written and tested for product development.
4

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