EVB9221-MINI SMSC, EVB9221-MINI Datasheet - Page 18

• Manufacturer Part Number: EVB9221-MINI
• Description: EVALUATION BOARD LAN9221-ABZJ
• Manufacturer: SMSC

Specifications of EVB9221-MINI

• Main Purpose: Interface, Ethernet Controller (PHY and MAC)
• Embedded: No
• Utilized Ic / Part: LAN9221
• Primary Attributes: 1 Port, 100BASE-TX/10BASE-T
• Secondary Attributes: 16-Bit, HP Auto-MDIX, Full and Half Duplex Support, 32-Bit CRC
• Processor To Be Evaluated: LAN9221
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 638-1074

Revision 2.7 (03-15-10)
Crystal 1, Clock In
Wakeup Indicator
Crystal 2
NAME
Reset
XTAL1/CLKIN
SYMBOL
nRESET
XTAL2
PME
Table 2.4 System and Power Signals
BUFFER
OCLK
VOD8
TYPE
lCLK
(PU)
VO8/
VIS
DATASHEET
18
PINS
NUM
1
1
1
1
High-Performance 16-bit Non-PCI 10/100 Ethernet Controller with Variable Voltage I/O
External 25MHz Crystal Input. This pin can also
be connected to single-ended TTL oscillator
(CLKIN). If this method is implemented, XTAL2
should be left unconnected.
External 25MHz Crystal output.
Active-low reset input. Resets all logic and
registers within the LAN9221/LAN9221i. This
signal is pulled high with a weak internal pull-up
resistor.
Note:
Note:
When programmed to do so, is asserted when
the LAN9221/LAN9221i detects a wake event
and is requesting the system to wake up from
the associated sleep state. The polarity and
buffer type of this signal is programmable.
Note:
The LAN9221/LAN9221i must be reset
on power-up via nRESET or following
power-up via a soft reset (SRST). The
LAN9221/LAN9221i must always be
read at least once after reset, or upon
return from a power-saving state or
write operations will not function. See
Section 3.11, "Detailed Reset
Description," on page 48
information
When operating at reduced
VDDVARIO voltage levels (less than
3.0V), this pin must be pulled-high to
a valid level with an external resistor
or must be driven as an input. Refer to
Section 2.2, "External Pull-Up/Pull-
Down Resistors"
Detection of a Power Management
Event, and assertion of the PME
signal will not wakeup the
LAN9221/LAN9221i. The
LAN9221/LAN9221iwill only wake up
when it detects a host write cycle
(assertion of nCS and nWR). Although
any write to the LAN9221/LAN9221i,
regardless of the data written, will
wake-up the device when it is in a
power-saving mode, it is required that
the BYTE_TEST register be used for
this purpose.
DESCRIPTION
for more information.
SMSC LAN9221/LAN9221i
for additional
Datasheet