SI5315-EVB Silicon Laboratories Inc, SI5315-EVB Datasheet - Page 55

• Manufacturer Part Number: SI5315-EVB
• Description: BOARD EVAL SI5315 8KHZ-644.53MHZ
• Manufacturer: Silicon Laboratories Inc

Specifications of SI5315-EVB

• Main Purpose: Timing, Clock Multiplier
• Embedded: No
• Utilized Ic / Part: SI5315
• Primary Attributes: 2 Inputs, 2 Outputs
• Secondary Attributes: CML, CMOS, LVDS, LVPECL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Notes (General):
Notes (Solder Mask Design):
Notes (Stencil Design):
Notes (Card Assembly):
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing is per the ANSI Y14.5M-1994 specification.
3. This Land Pattern Design is based on IPC-SM-782 guidelines.
4. All dimensions shown are at Maximum Material Condition (MMC). Least Material
1. All metal pads are to be non-solder mask defined (NSMD). Clearance between the
1. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be
2. The stencil thickness should be 0.125 mm (5 mils).
3. The ratio of stencil aperture to land pad size should be 1:1 for the perimeter pads.
4. A 4 x 4 array of 0.80 mm square openings on 1.05 mm pitch should be used for the
1. A No-Clean, Type-3 solder paste is recommended.
2. The recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for
Condition (LMC) is calculated based on a Fabrication Allowance of 0.05 mm.
solder mask and the metal pad is to be 60 µm minimum, all the way around the pad.
used to assure good solder paste release.
center ground pad.
Small Body Components.
Dimension
GD
GE
E2
D2
ZE
ZD
D
E
X
Y
e
Table 22. PCB Land Pattern Dimensions
Rev. 0.26
4.00
4.00
4.53
4.53
MIN
—
—
—
0.50 BSC.
5.42 REF.
5.42 REF.
0.89 REF.
MAX
4.20
4.20
0.28
6.31
6.31
—
—
Si5315
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