SI5315-EVB Silicon Laboratories Inc, SI5315-EVB Datasheet - Page 40

no-image

SI5315-EVB

Manufacturer Part Number
SI5315-EVB
Description
BOARD EVAL SI5315 8KHZ-644.53MHZ
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of SI5315-EVB

Main Purpose
Timing, Clock Multiplier
Embedded
No
Utilized Ic / Part
SI5315
Primary Attributes
2 Inputs, 2 Outputs
Secondary Attributes
CML, CMOS, LVDS, LVPECL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Si5315
+
SFOUT[1:0] = ML (Output disable)
100
100
CKOUTn
Output from
DSPLL
Figure 16. Disable CKOUTn Structure
The SFOUT [1:0] pins can also be used to disable both outputs. Disabling the output puts the CKOUTn+ and
CKOUTn– pins in a high-impedance state relative to V
(common mode tri-state) while the two outputs remain
DD
connected to each other through a 200  on-chip resistance (differential impedance of 200 ). The maximum
amount of internal circuitry is powered down, minimizing power consumption and noise generation. Recovery from
the disable mode requires additional time as specified in Table 3, “AC Characteristics”.
40
Rev. 0.26

Related parts for SI5315-EVB