LMX2485E EVAL National Semiconductor, LMX2485E EVAL Datasheet - Page 18

• Manufacturer Part Number: LMX2485E EVAL
• Description: BOARD EVALUATION LMX2485E
• Manufacturer: National Semiconductor
• Series: PLLatinum™r

Specifications of LMX2485E EVAL

• Main Purpose: Timing, Frequency Synthesizer
• Utilized Ic / Part: LMX2485E
• Lead Free Status / RoHS Status: Not applicable / Not applicable
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -

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Sensitivity Measurement Procedure
Sensitivity is defined as the power level limits beyond which
the output of the counter being tested is off by 1 Hz or more
of its expected value. It is typically measured over frequency,
voltage, and temperature. In order to test sensitivity, the MUX
[3:0] word is programmed to the appropriate value. The
counter value is then programmed to a fixed value and a fre-
quency counter is set to monitor the frequency of this pin. The
expected frequency at the Ftest/LD pin should be the signal
generator frequency divided by twice the corresponding
counter value. The factor of two comes in because the
LMX2485 has a flip-flop which divides this frequency by two
to make the duty cycle 50% in order to make it easier to read
with the frequency counter. The frequency counter input
impedance should be set to high impedance. In order to per-
form the measurement, the temperature, frequency, and volt-
age is set to a fixed value and the power level of the signal is
varied. Note that the power level at the part is assumed to be
Frequency Input Pin
OSCin
OSCin
FinRF
FinIF
DC Blocking Capacitor
100 pF// 1000 pF
1000 pF
1000 pF
100 pF
Corresponding
RF_R / 2
RF_N / 2
Counter
IF_N / 2
IF_R / 2
18
4 dB less than the signal generator power level. This accounts
for 1 dB for cable losses and 3 dB for the pad. The power level
range where the frequency is correct at the Ftest/LD pin to
within 1 Hz accuracy is recorded for the sensitivity limits. The
temperature, frequency, and voltage can be varied in order to
produce a family of sensitivity curves. Since this is an open-
loop test, the charge pump is set to TRI-STATE and the
unused side of the PLL (RF or IF) is powered down when not
being tested. For this part, there are actually four frequency
input pins, although there is only one frequency test pin (Ftest/
LD). The conditions specific to each pin are shown in above
table.
Note that for the RF N counter, a fourth order fractional mod-
ulator is used in 22-bit mode with a fraction of 2097150 /
4194301 is used. The reason for this long fraction is to test
the RF N counter and supporting fractional circuitry as com-
pletely as possible.
Default Counter Value
502 + 2097150 /
4194301
534
50
50
MUX Value
14
15
13
12
20087770