CDB42448 Cirrus Logic Inc, CDB42448 Datasheet - Page 22

BOARD EVAL FOR CS42448 CODEC

CDB42448

Manufacturer Part Number
CDB42448
Description
BOARD EVAL FOR CS42448 CODEC
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CDB42448

Main Purpose
Audio, CODEC
Embedded
Yes, FPGA / CPLD
Utilized Ic / Part
CS42448
Primary Attributes
24-Bit, 192 kHz, 6 ADCs: 102dB Dynamic Range, 8 DACs: 105dB Dynamic Range
Secondary Attributes
Time Division Multiplexed (TDM), I2C, and SPI Interface, Popguard® Technology
Description/function
Audio CODECs
Operating Supply Voltage
5 V to 12 V
Product
Audio Modules
For Use With/related Products
CS42448
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
598-1151
22
SWITCHING SPECIFICATIONS - CONTROL PORT - SPI FORMAT
VLC = 1.8 V - 5.0 V, VLS = VD = 3.3 V, VA = 5.0 V; Inputs: Logic 0 = DGND, Logic 1 = VLC, CDOUT C
Notes:
CCLK Clock Frequency
RST Rising Edge to CS Falling
CS Falling to CCLK Edge
CS High Time Between Transmissions
CCLK Low Time
CCLK High Time
CDIN to CCLK Rising Setup Time
CCLK Rising to DATA Hold Time
CCLK Falling to CDOUT Stable
Rise Time of CDOUT
Fall Time of CDOUT
Rise Time of CCLK and CDIN
Fall Time of CCLK and CDIN
24. Data must be held for sufficient time to bridge the transition time of CCLK.
25. For f
sck
CDOUT
CCLK
CDIN
<1 MHz.
RST
CS
Parameter
t
srs
t
css
Figure 9. Control Port Timing - SPI Format
t
sch
t
pd
t
scl
t
(Note 24)
(Note 25)
(Note 25)
dsu
MSB
MSB
t
dh
t
f2
Symbol
t
t
f
t
t
t
t
t
t
sck
css
csh
sch
dsu
t
t
t
t
srs
scl
dh
pd
r1
r2
f1
f2
t
r2
Min
1.0
20
20
66
66
40
15
0
-
-
-
-
-
t
csh
Max
100
100
6.0
50
25
25
-
-
-
-
-
-
-
CS42448
L
DS648F3
= 30 pF.
Units
MHz
μs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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