EVAL-ADF4118EB1 Analog Devices Inc, EVAL-ADF4118EB1 Datasheet - Page 5
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EVAL-ADF4118EB1
Manufacturer Part Number
EVAL-ADF4118EB1
Description
BOARD EVAL FOR ADF4118
Manufacturer
Analog Devices Inc
Datasheet
1.ADF4116BRUZ-REEL.pdf
(28 pages)
Specifications of EVAL-ADF4118EB1
Main Purpose
Timing, Frequency Synthesizer
Embedded
No
Utilized Ic / Part
ADF4118
Primary Attributes
Single Integer-N PLL
Secondary Attributes
1.96GHz WCDMA, Graphical User Interface
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
TIMING CHARACTERISTICS
AV
Guaranteed by design, but not production tested.
Table 2.
Parameter
t
t
t
t
t
t
1
2
3
4
5
6
DD
= DV
DD
DATA
= 3 V ± 10%, 5 V ± 10%; AV
CLK
LE
LE
Limit at T
10
10
25
25
10
20
DB20 (MSB)
MIN
to T
MAX
t
1
(B, Y Version)
DD
DB19
≤ V
t
P
2
< 6.0 V; AGND = DGND = CPGND = 0 V; T
Figure 2. Timing Diagram
Rev. D | Page 5 of 28
DB2
t
3
t
4
(CONTROL BIT C2)
Unit
ns min
ns min
ns min
ns min
ns min
ns min
DB1
ADF4116/ADF4117/ADF4118
Test Conditions/Comments
DATA to CLK setup time
DATA to CLK hold time
CLK high duration
CLK low duration
CLK to LE setup time
LE pulse width
A
= T
(CONTROL BIT C1)
MIN
DB0 (LSB)
to T
t
5
MAX
, unless otherwise noted.
t
6