EVAL-ADF4118EB1 Analog Devices Inc, EVAL-ADF4118EB1 Datasheet - Page 15

• Manufacturer Part Number: EVAL-ADF4118EB1
• Description: BOARD EVAL FOR ADF4118
• Manufacturer: Analog Devices Inc

Specifications of EVAL-ADF4118EB1

• Main Purpose: Timing, Frequency Synthesizer
• Embedded: No
• Utilized Ic / Part: ADF4118
• Primary Attributes: Single Integer-N PLL
• Secondary Attributes: 1.96GHz WCDMA, Graphical User Interface
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

LATCH MAPS
LDP
DB20
0
1
LDP
3 CONSECUTIVE CYCLES OF PHASE DELAY LESS THAN
15ns MUST OCCUR BEFORE LOCK DETECT IS SET.
5 CONSECUTIVE CYCLES OF PHASE DELAY LESS THAN
15ns MUST OCCUR BEFORE LOCK DETECT IS SET.
OPERATION
DB19
T4
TEST MODE BITS SHOULD
BE SET TO 0000 FOR
NORMAL OPERATION
DB18
MODE BITS
T3
TEST
DB17
T2
DB16
T1
DB15
R14
DB14
R13
DB13
R12
Figure 31. Reference Counter Latch Map
DB12
R11
R14
0
0
0
0
1
1
1
1
•
•
•
Rev. D | Page 15 of 28
DB11
R10
14-BIT REFERENCE COUNTER, R
DB10
R13
R9
0
0
0
0
1
1
1
1
•
•
•
DB9
R8
R12
0
0
0
0
1
1
1
1
•
•
•
DB8
R7
•• • • • • •• • •
•• • • • • •• • •
•• • • • • •• • •
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•• • • • • •• • •
•• • • • • •• • •
•• • • • • •• • •
•• • • • • •• • •
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•• • • • • •• • •
• •• • • • • •• •
•• • •• • • • • •
DB7
R6
ADF4116/ADF4117/ADF4118
DB6
R5
R3
0
0
0
1
1
1
1
1
•
•
•
DB5
R4
R2
0
1
1
0
0
0
1
1
•
•
•
DB4
R3
DB3
R1
R2
1
0
1
0
0
1
0
1
•
•
•
DB2
R1
DIVIDE RATIO
C2 (0)
DB1
163 80
163 81
163 82
163 83
CONTROL
1
2
3
4
•
•
•
BITS
C1 (0)
DB0