HW-FMC-VIDEO-DC-G Xilinx Inc, HW-FMC-VIDEO-DC-G Datasheet - Page 31

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HW-FMC-VIDEO-DC-G

Manufacturer Part Number
HW-FMC-VIDEO-DC-G
Description
HARDWARE FMC-VIDEO DAUGHTER CARD
Manufacturer
Xilinx Inc
Datasheet

Specifications of HW-FMC-VIDEO-DC-G

Accessory Type
Daughter Card
For Use With/related Products
Spartan 3A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
FMC-Video Daughter Board
UG458 (v1.1) February 8, 2008
R
DVI-Digital
DVI-Analog
S-Video
Composite
Camera 1
Camera 2
The DVI output on the carrier board generates a VGA test pattern of red, green, and blue
ramps. This is received by FMC-Video and is compared against what was sent. To pass this
test, the received clock frequency must be correct and the test pattern must be received
with no errors.
The DVI output on the carrier board generates a VGA test pattern of red, green, and blue
ramps. This is received by FMC-Video and is compared against what was sent. To pass this
test, the received clock frequency must be correct and the test pattern must closely match
the test pattern. Since this is an analog interface, the digitized version will never perfectly
match the sent image, so some error is acceptable. To pass, the majority of the pixels must
be within a small error range of the test pattern value.
The S-Video output on the carrier board generates an NTSC test pattern of red, green, and
blue ramps. This is received by FMC-Video and is compared against what was sent. To
pass this test, the received clock frequency must be correct and the test pattern must closely
match the test pattern. Since this is an analog interface, the digitized version will never
perfectly match the sent image, so some error is acceptable. To pass, the majority of the
pixels must be within a small error range of the test pattern value.
The composite output on the carrier board generates an NTSC test pattern of red, green,
and blue ramps. This is received by FMC-Video and is compared against what was sent. To
pass this test, the received clock frequency must be correct and the test pattern must closely
match the test pattern. Since this is an analog interface, the digitized version will never
perfectly match the sent image, so some error is acceptable. To pass, the majority of the
pixels must be within a small error range of the test pattern value.
The camera is configured to generate a test pattern. This is received by FMC-Video and is
compared against what the test pattern is supposed to be. To pass this test, the received
clock frequency must be correct and the test pattern must be received with no errors.
This test is the same as Camera 1.
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Loopback Design
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