HW-FMC-VIDEO-DC-G Xilinx Inc, HW-FMC-VIDEO-DC-G Datasheet - Page 20
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HW-FMC-VIDEO-DC-G
Manufacturer Part Number
HW-FMC-VIDEO-DC-G
Description
HARDWARE FMC-VIDEO DAUGHTER CARD
Manufacturer
Xilinx Inc
Datasheet
1.HW-FMC-VIDEO-DC-G.pdf
(34 pages)
Specifications of HW-FMC-VIDEO-DC-G
Accessory Type
Daughter Card
For Use With/related Products
Spartan 3A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Chapter 2: Hardware Overview
Clocks
20
Carrier-to-Mezzanine (C2M) Clock
Mezzanine-to-Carrier (M2C) Clock
Table 2-3:
FMC-Video only has one clock input and one clock output from the FMC connector.
The clock input to FMC-Video is used to drive the video encoder for the S-Video output,
typically at 27 MHz.
This clock output is needed by all of the video interfaces, which includes four sources:
DVI-Analog, DVI-Digital, the video decoder, and camera input 1. This requires a clock
multiplexor, the ICS83054I. The select lines to this multiplexor are driven by the I
Expander. The clock multiplexor circuit is diagrammed in
P00
P01
P02
P03
P04
P05
P06
P07
P10
P11
P12
P13
P14
P15
P16
P17
Signal
/RESET
/CAM2_LOCK
/CAM2_PD
/VIDIN_INT
CAM1_OE
/CAM1_PD
/CAM1_LOCK
DVIIN_CLKINV
DVI_5V
DVIIN_ST
DVIIN_SCDT
DVIIN_OE
CLKMUX_SEL0
CLKMUX_SEL1
/PGOOD
/STATUS_LED
I
2
C I/O Expander Signal List
Name
www.xilinx.com
Direction
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
Reset signal to PCA9546A, ADV7179,
ADV7180.
Lock signal from Camera 2 deserializer.
Power down control to Camera 2.
Interrupt signal from ADV7180.
Output Enable signal to Camera 1
deserializer.
Power down control to Camera 1.
Lock signal from Camera 1 deserializer.
Select TFP403 Clock edge
Plug detect signal from DVI connector.
Select TFP403 Drive Strength
Scan detect from DVI digital receiver.
Output Enable signal to DVI digital
receiver.
Clock Multiplexor select bit 0.
Clock Multiplexor select bit 1.
Power good status from Power Monitor.
Software Ready Status LED, low to turn on.
Figure
UG458 (v1.1) February 8, 2008
Description
FMC-Video Daughter Board
2-5.
2
C I/O
R