MT9HTF6472FY-53EB4E3 Micron Technology Inc, MT9HTF6472FY-53EB4E3 Datasheet - Page 9

• Manufacturer Part Number: MT9HTF6472FY-53EB4E3
• Description: MODULE DDR2 512MB 240FBDIMM
• Manufacturer: Micron Technology Inc

Specifications of MT9HTF6472FY-53EB4E3

• Memory Type: DDR2 SDRAM
• Memory Size: 512MB
• Speed: 533MT/s
• Package / Case: 240-FBDIMM
• Main Category: DRAM Module
• Sub-category: DDR2 SDRAM
• Module Type: 240FBDIMM
• Device Core Size: 72b
• Organization: 64Mx72
• Total Density: 512MByte
• Chip Density: 512Mb
• Package Type: FBDIMM
• Maximum Clock Rate: 533MHz
• Operating Supply Voltage (typ): 1.8V
• Number Of Elements: 9
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Operating Temp Range: 0C to 95C
• Operating Temperature Classification: Commercial
• Pin Count: 240
• Mounting: Socket
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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Table 10:
PDF: 09005aef81a2f1eb/Source: 09005aef81a2f20c
HTF9C64_128x72F.fm - Rev. B 9/07 EN
Symbol
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_Idle_0
_Idle_1
_Active_1
_Active_2
_Training
_IBIST
_EI
Conditions and Specifications
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Conditions
Notes:
1. Actual test conditions may vary from published JEDEC test conditions.
Condition
Idle current, single or last DIMM: L0 state; Idle (0 percent bandwidth); Primary channel
enabled; Secondary channel disabled; CKE HIGH; Command and address lines stable; DDR2
SDRAM clock active
Idle current, first DIMM: L0 state; Idle (0 percent bandwidth); Primary and secondary
channels enabled; CKE HIGH; Command and address lines stable; DDR2 SDRAM clock active
Active power: L0 state; 50 percent DRAM bandwidth; 67 percent READ; 33 percent WRITE;
Primary and secondary channels enabled; DDR2 SDRAM clock active; CKE HIGH
Active power, data pass through: L0 state; 50 percent DRAM bandwidth to downstream
DIMM; 67 percent READ; 33 percent WRITE; Primary and secondary channels enabled; DDR2
SDRAM clock active; CKE HIGH; Command and address lines stable
Training: Primary and secondary channels enabled; 100 percent toggle on all channel lanes;
DRAMs idle; 0 percent bandwidth; CKE HIGH; Command and address lines stable; DDR2
SDRAM clock active
IBIST over all IBIST modes: DRAM idle (0 percent bandwidth); Primary channel enabled;
Secondary channel enabled; CKE HIGH; Command and address lines stable; DDR2 SDRAM
clock active
Electrical idle: DRAM idle (0 percent bandwidth); Primary channel disabled; Secondary
channel disabled; CKE LOW; Command and address lines floated; DDR2 SDRAM clock active;
ODT and CKE driven LOW
512MB, 1GB (x72, SR) 240-Pin DDR2 SDRAM FBDIMM
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Micron Technology, Inc., reserves the right to change products or specifications without notice.
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Conditions and Specifications
©2005 Micron Technology, Inc. All rights reserved.