MT4VDDT864AG-265B1 Micron Technology Inc, MT4VDDT864AG-265B1 Datasheet - Page 13
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MT4VDDT864AG-265B1
Manufacturer Part Number
MT4VDDT864AG-265B1
Description
MODULE SDRAM DDR 64MB 184DIMM
Manufacturer
Micron Technology Inc
Datasheet
1.MT4VDDT864AG-265B1.pdf
(28 pages)
Specifications of MT4VDDT864AG-265B1
Memory Type
DDR SDRAM
Memory Size
64MB
Speed
266MT/s
Package / Case
184-DIMM
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Table 12: I
DDR SDRAM components only
Notes: 1–5, 8, 10, 12, 48; notes appear on pages 18–21; 0°C ≤ T
pdf: 09005aef8085081a, source: 09005aef806e129d
DD4C8_16_32x64AG.fm - Rev. B 9/04 EN
OPERATING CURRENT: One device bank; Active-Precharge;
t
once per clock cycle; Address and control inputs changing once
every two clock cycles.
OPERATING CURRENT: One device bank; Active-Read-Precharge;
Burst = 2;
and control inputs changing once per clock cycle.
PRECHARGE POWER-DOWN STANDBY CURRENT: All device banks
idle; Power-down mode;
IDLE STANDBY CURRENT: CS# = HIGH; All device banks idle;
t
once per clock cycle. V
ACTIVE POWER-DOWN STANDBY CURRENT: One device bank
active; Power-down mode;
ACTIVE STANDBY CURRENT: CS# = HIGH; CKE = HIGH; One device
bank; Active-Precharge;
DM, and DQS inputs changing twice per clock cycle; Address and
other control inputs changing once per clock cycle.
OPERATING CURRENT: Burst = 2; Reads; Continuous burst; One
device bank active; Address and control inputs changing once per
clock cycle;
OPERATING CURRENT: Burst = 2; Writes; Continuous burst; One
device bank active; Address and control inputs changing once per
clock cycle;
twice per clock cycle.
AUTO REFRESH CURRENT
SELF REFRESH CURRENT: CKE ≤ 0.2V
OPERATING CURRENT: Four device bank interleaving READs (BL =
4) with auto precharge,
and control inputs change only during Active, READ, or WRITE
commands.
RC (MIN);
CK (MIN); CKE = HIGH; Address and other control inputs changing
t
t
RC =
CK =
t
t
CK =
CK =
t
DD
RC (MIN);
t
CK (MIN); DQ, DM, and DQS inputs changing
t
t
CK (MIN); I
CK (MIN); DQ, DM, and DQS inputs changing
PARAMETER/CONDITION
Specifications and Conditions – 64MB
IN
t
t
= V
RC =
RC =
t
CK =
t
CK =
t
REF
CK =
OUT
t
t
RAS (MAX);
RC (MIN);
t
for DQ, DQS, and DM.
CK (MIN); CKE = LOW.
t
= 0mA.
CK (MIN); I
t
CK (MIN); CKE = LOW.
t
CK =
t
t
t
REFC =
REFC = 15.625µs
CK =
OUT
t
CK (MIN); Address
= 0mA; Address
t
CK (MIN); DQ,
t
RFC (MIN)
t
RC =
t
13
CK =
A
≤ +70°C; V
64MB, 128MB, 256MB (x64, SR)
I
I
I
I
SYM
I
I
I
DD 4 W
I
I
DD 3 N
I
DD 5A
I
I
DD 2 P
DD 3 P
DD 4 R
DD 2 F
DD 0
DD 1
DD 5
DD 6
DD 7
Micron Technology, Inc., reserves the right to change products or specifications without notice.
184-PIN DDR SDRAM UDIMM
DD
= V
1,060
1,540
-335
500
540
180
100
200
580
620
12
20
12
DD
Q = +2.5V ±0.2V
MAX
1,000
1,500
-262
440
540
180
100
200
560
520
12
20
12
-26A/
1,000
1,500
-265
440
500
160
180
540
520
12
80
20
8
UNITS
©2004 Micron Technology, Inc.
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
NOTES
21, 28,
21, 28,
20, 42
20, 42
20, 42
24, 44
20, 43
44
45
44
20
20
44
9