MT18LSDT6472G-13ED2 Micron Technology Inc, MT18LSDT6472G-13ED2 Datasheet - Page 18

• Manufacturer Part Number: MT18LSDT6472G-13ED2
• Description: MODULE SDRAM 512MB 168DIMM
• Manufacturer: Micron Technology Inc

Specifications of MT18LSDT6472G-13ED2

• Memory Type: SDRAM
• Memory Size: 512MB
• Speed: 133MHz
• Package / Case: 168-DIMM
• Main Category: DRAM Module
• Sub-category: SDRAM
• Module Type: 168RDIMM
• Device Core Size: 72b
• Organization: 64Mx72
• Total Density: 4831838208
• Chip Density: 256Mb
• Access Time (max): 5.4ns
• Maximum Clock Rate: 133MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Current: 2.43A
• Number Of Elements: 18
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Operating Temp Range: 0C to 55C
• Operating Temperature Classification: Commercial
• Pin Count: 168
• Mounting: Socket
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Table 19: Serial Presence-Detect EEPROM DC Operating Conditions
All voltages referenced to V
Table 20: Serial Presence-Detect EEPROM AC Operating Conditions
All voltages referenced to V
NOTE:
1. The SPD EEPROM WRITE cycle time (
16,32,Meg x 64 DDR SDRAM DIMMs (Footer Desc variable)
SD18C16_32_64x72G_B.fm - Rev. B 1/03 EN
SUPPLY VOLTAGE
INPUT HIGH VOLTAGE: Logic 1; All inputs
INPUT LOW VOLTAGE: Logic 0; All inputs
OUTPUT LOW VOLTAGE: I
INPUT LEAKAGE CURRENT: V
OUTPUT LEAKAGE CURRENT: V
STANDBY CURRENT: SCL = SDA = V
POWER SUPPLY CURRENT:
SCL clock frequency = 100 KHz
SCL LOW to SDA data-out valid
Time the bus must be free before a new transition cans tart
Data-out hold time
SDA and SCL fall time
Data-in hold time
Start condition hold time
Clock HIGH period
Noise suppression time constant at SCL, SDA inputs
Clock LOW period
SDA and SCL rise time
SCL clock frequency
Data-in setup time
Start condition setup time
Stop condition setup time
WRITEcycle time
the EEPROM internal erase/program cycle. During the WRITE cycle, the EEPROM bus interface circuit is disabled, SDA
remains HIGH due to pull-up resistor, and the EEPROM does not respond to its slave address.
PARAMETER/CONDITION
PARAMETER/CONDITION
OUT
SS
SS
IN
; V
; V
= 3mA
OUT
= GND to V
DD
DD
DD
= +3.3V ±0.3V
= +3.3V ±0.3V
= GND to V
- 0.3V; All other inputs = V
t
WRC) is the time from a valid stop condition of a write sequence to the end of
DD
DD
168-PIN REGISTERED SDRAM DIMM
18
128MB, 256MB, 512MB (x72, ECC)
SS
or V
SYMBOL
t
t
t
t
t
HD:DAT
HD:STA
SU:DAT
SU:STO
SU:STA
t
DD
t
t
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
HIGH
LOW
t
WRC
t
t
BUF
SCL
AA
DH
t
t
t
R
F
I
SYMBOL
V
V
V
I
V
I
I
I
DD
LO
SB
DD
OL
LI
IH
IL
MIN
300
250
V
0.3
4.7
4.7
4.7
4.7
0
4
4
DD
MIN
-1
3
–
–
–
–
–
x 0.7
MAX UNITS
300
100
100
3.5
10
1
V
V
DD
DD
MAX
KHz
ms
3.6
0.4
10
10
30
µs
µs
ns
ns
µs
µs
µs
ns
µs
µs
ns
µs
µs
2
©2003, Micron Technology Inc.
+ 0.5
x 0.3
NOTES
UNITS
1
mA
µA
µA
µA
V
V
V
V