MT8VDDT6432UY-5K1 Micron Technology Inc, MT8VDDT6432UY-5K1 Datasheet - Page 19
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MT8VDDT6432UY-5K1
Manufacturer Part Number
MT8VDDT6432UY-5K1
Description
MODULE DDR 256MB 100-DIMM
Manufacturer
Micron Technology Inc
Datasheet
1.MT8VDDT6432UY-5K1.pdf
(36 pages)
Specifications of MT8VDDT6432UY-5K1
Memory Type
DDR SDRAM
Memory Size
256MB
Speed
400MT/s
Package / Case
100-DIMM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 12:
pdf: 09005aef80745603, source: 09005aef807455eb
DD8C32_64_128x32UG_2.fm - Rev. G 5/05 EN
OPERATING CURRENT: One device bank; Active-Precharge;
t
changing once per clock cyle; Address and control inputs
changing once every two clock cycles
OPERATING CURRENT: One device bank; Active -Read Precharge;
Burst = 4;
and control inputs changing once per clock cycle
PRECHARGE POWER-DOWN STANDBY CURRENT: All device banks
idle; Power-down mode;
IDLE STANDBY CURRENT: CS# = HIGH; All device banks idle;
t
changing once per clock cycle. V
ACTIVE POWER-DOWN STANDBY CURRENT: One device bank
active; Power-down mode;
ACTIVE STANDBY CURRENT: CS# = HIGH; CKE = HIGH; One device
bank; Active-Precharge;
DM and DQS inputs changing twice per clock cycle; Address and
other control inputs changing once per clock cycle
OPERATING CURRENT: Burst = 2; Reads; Continuous burst; One
device bank active; Address and control inputs changing once per
clock cycle;
OPERATING CURRENT: Burst = 2; Writes; Continuous burst; One
device bank active; Address and control inputs changing once per
clock cycle;
twice per clock cycle
AUTO REFRESH CURRENT
SELF REFRESH CURRENT: CKE ≤ 0.2V
OPERATING CURRENT: Four device bank interleaving READs (BL =
4) with auto precharge,
and control inputs change only during Active READ or WRITE
commands
a: Value calculated as one module rank in this operating condition, and all other module ranks in I
b: Value calculated reflects all module ranks in this operating condition.
RC =
CK =
t
t
RC (MIN);
CK MIN; CKE = HIGH; Address and other control inputs
t
RC =
Parameter/Condition
t
t
CK =
CK =
I
DDR SDRAM components only
Notes: 1–5, 14, 48; notes appear on pages 23–27; 0°C ≤ T
DD
t
t
RC (MIN);
CK =
t
t
CK (MIN); I
CK (MIN); DQ, DM, and DQS inputs changing
Specifications and Conditions – 256MB
t
CK (MIN); DQ, DM and DQS inputs
t
t
RC =
RC =
t
CK =
t
CK =
t
CK =
OUT
t
t
RC (MIN);
RAS (MAX);
t
CK (MIN); CKE = (LOW)
t
IN
CK (MIN); I
= 0mA
t
= V
CK (MIN); CKE = LOW
REF
t
for DQ, DQS, and DM
CK =
t
CK =
OUT
t
t
t
CK (MIN); Address
= 0mA; Address
REFC =
REFC = 7.8125µs
128MB, 256MB, 512MB: (x32, DR) 100-Pin DDR UDIMM
t
CK (MIN); DQ,
t
RFC (MIN)
19
Symbol
I
I
I
I
I
I
I
DD4W
A
I
I
I
DD3N
DD5A
I
I
Micron Technology, Inc., reserves the right to change products or specifications without notice.
DD2P
DD2F
DD3P
DD4R
DD
DD0
DD1
DD6
DD7
≤ +70°C; V
5
b
a
a
b
a
b
b
b
a
b
b
a
DD
2,040
1,656
516
696
400
240
480
716
716
32
48
32
-6
= +2.5V ±0.2V
Max
©2004, 2005 Micron Technology, Inc. All rights reserved.
-75Z/
1,880
1,416
496
596
360
200
400
616
616
-75
32
48
32
DD
Parameter Tables
2p (CKE LOW) mode.
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
21, 28, 44
21, 28, 44
Notes
20, 42
20, 42
20, 42
20, 44
24, 44
20, 43
45
41
20
9