MT4VDDT3264HY-335F2 Micron Technology Inc, MT4VDDT3264HY-335F2 Datasheet - Page 28

• Manufacturer Part Number: MT4VDDT3264HY-335F2
• Description: MODULE DDR 256MB 200-SODIMM
• Manufacturer: Micron Technology Inc

Specifications of MT4VDDT3264HY-335F2

• Memory Type: DDR SDRAM
• Memory Size: 256MB
• Speed: 333MT/s
• Package / Case: 200-SODIMM
• Main Category: DRAM Module
• Sub-category: DDR SDRAM
• Module Type: 200SODIMM
• Device Core Size: 64b
• Organization: 32Mx64
• Total Density: 256MByte
• Chip Density: 512Mb
• Access Time (max): 700ps
• Maximum Clock Rate: 333MHz
• Operating Supply Voltage (typ): 2.5V
• Operating Current: 780mA
• Number Of Elements: 4
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Pin Count: 200
• Mounting: Socket
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 557-1231; MT4VDDT3264HY-335F2

Table 21: Serial Presence-Detect Matrix (Continued)
“1”/“0”: Serial Data, “driven to HIGH”/“driven to LOW”; notes appear on page 28
NOTE:
pdf: 09005aef8086ea3d, source: 09005aef8086ea0b
DD4C8_16_32x64HG.fm - Rev. C 9/04 EN
99-127 Manufacturer-specific Data (RSVD)
1. Value for -26A
2. The value of
3. The JEDEC SPD specification allows fast or slow slew rate values for these bytes. The worst-case (slow slew rate) value is
4. The value of
BYTE
36-40 Reserved
46-61 Reserved
48-61 Reserved
65-71 Manufacturer’s JEDEC IDCode
73-90 Module Part Number (ASCII)
95-98 Module Serial Number
30
31
32
33
34
35
41
42
43
44
45
47
62
63
64
72
91
92
93
94
represented here. Systems requiring the fast slew rate setup and hold values are supported, provided the faster mini-
mum slew rate is met.
SDRAM device specification is 15ns.
Minimum RAS# Pulse Width,
(see note 2)
Module Rank Density
Address and Command Setup Time,
t
Address and Command Hold Time,
t
Data/Data Mask Input Setup Time,
t
Data/Data Mask Input Hold Time,
Min Active Auto Refresh Time,
Minimum Auto Refresh to Active/
Auto Refresh Command Period,
SDRAM Device Max Cycle Time,
t
SDRAM Device Max DQS-DQ Skew
Time,
SDRAM Device Max Read Data Hold
Skew Factor,
DIMM Height
SPD Revision
Checksum for Bytes 0–62
Manufacturer’s JEDEC ID Code
Manufacturing Location
PCB Identification Code
Identification Code (Continued)
Year of Manufacture in BCD
Week of Manufacturein BCD
IS, (see note 3)
IH, (see note 3)
DS
CK
MAX
t
DQSQ
t
t
RAS used for -262/-26A/-265 modules is calculated from
RP,
t
CK set to 7ns (0x70) for optimum BIOS compatibility. Actual device spec. value is 7.5ns.
DESCRIPTION
t
RCD, and
t
QHS
t
RAP for -335 modules indicated as 18ns to align with industry specifications; actual DDR
t
RAS,
t
RC
t
RFC
t
DH
0.75ns (-262/-26A/-265)
1.0ns (-262/-26A/-265)
1.0ns (-262/-26A/-265)
0.5ns (-262/-26A/-265)
0.5ns (-262/-26A/-265)
0.5ns (-262/-26A/-265)
64MB, 128MB, 256MB
45ns (-262/-26A/-265)
75ns (-262/-26A/-265)
13ns (-262/-26A/-265)
ENTRY (VERSION)
65ns (-26A/-265)
60ns (335/-262)
0.45ns (-335)
0.45ns (-335)
0.45ns (-335)
0.55ns (-335)
(Continued)
0.8ns (-335)
0.8ns (-335)
42ns (-335)
72ns (-335)
12ns (-335)
Release 1.0
MICRON
01–12
-26A
-335
-262
-265
1–9
0
28
64MB, 128MB, 256MB (x64, SR)
200-PIN DDR SDRAM SODIMM
Micron Technology, Inc., reserves the right to change products or specifications without notice.
MT4VDDT864H MT4VDDT1664H MT4VDDT3264H
Variable Data
Variable Data
Variable Data
Variable Data
Variable Data
t
RC -
01–0C
01–09
t
2A
2D
A0
A0
2D
10
80
80
45
50
45
50
00
3C
41
48
4B
30
34
32
55
75
00
01
00
10
FC
FC
EC
2C
00
00
8F
RP. Actual device spec. value is 40 ns.
Variable Data
Variable Data
Variable Data
Variable Data
Variable Data
01–0C
01–09
©2004 Micron Technology, Inc. All rights reserved.
2A
2D
A0
A0
2D
A2
20
80
80
45
50
45
50
00
3C
41
48
4B
30
34
32
55
75
00
01
00
10
CF
2C
00
0F
FF
00
Variable Data
Variable Data
Variable Data
Variable Data
Variable Data
01–0C
01–09
2A
2D
A0
A0
2D
40
3C
4B
C3
2C
80
80
45
50
45
50
00
41
48
30
34
32
55
75
00
01
00
10
30
F0
20
00
00