HYS64T128021HDL-3S-B Qimonda, HYS64T128021HDL-3S-B Datasheet - Page 3

MODULE DDR2 1GB 200-SODIMM

HYS64T128021HDL-3S-B

Manufacturer Part Number
HYS64T128021HDL-3S-B
Description
MODULE DDR2 1GB 200-SODIMM
Manufacturer
Qimonda
Datasheet

Specifications of HYS64T128021HDL-3S-B

Memory Type
DDR2 SDRAM
Memory Size
1GB
Speed
333MHz
Package / Case
200-SODIMM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
675-1026
1
This chapter gives an overview of the 200-pin Small-Outline DDR2 SDRAM modules product family and describes its main
characteristics.
1.1
• 200-Pin PC2-6400, PC2-5300, PC2-4200 and PC2-3200
• 32M × 64, 64M × 64 and 128M × 64 module
• 256MB, 512MB and 1GB modules built with 512-Mbit
• Standard Double-Data-Rate-Two Synchronous DRAMs
• All speed grades faster than DDR2-400 comply with
• Programmable CAS Latencies (3, 4, 5 and 6 ), Burst
1) RoHS Compliant Product: Restriction of the use of certain hazardous substances (RoHS) in electrical and electronic equipment as defined
Rev. 1.12, 2007-10
03292006-5LTN-QML0
QAG Speed Code
DRAM Speed Grade
Module Speed Grade
CAS-RCD-RP latencies
Max.
Clock Frequency
Min. RAS-CAS-Delay
Min. Row Precharge Time
Min. Row Active Time
Min. Row Cycle Time
DDR2 SDRAM memory modules.
organization,and 32M × 16, 64M × 8 chip organization
DDR2 SDRAMs in P-TFBGA-84 and P-TFBGA-60
chipsize packages
(DDR2 SDRAM) with a single + 1.8 V (± 0.1 V) power
supply
DDR2-400 timing specifications.
Length (8 & 4).
in the directive 2002/95/EC issued by the European Parliament and of the Council of 27 January 2003. These substances include mercury,
lead, cadmium, hexavalent chromium, polybrominated biphenyls and polybrominated biphenyl ethers.
Features
CL3
CL4
CL5
CL6
Overview
DDR2
PC2
f
f
f
f
t
t
t
t
CK3
CK4
CK5
CK6
RCD
RP
RAS
RC
–25F
–800D
–6400D
5–5–5
200
266
400
12.5
12.5
45
57.5
–2.5
–800E
–6400E
6–6–6
200
266
333
400
15
15
45
60
3
• Auto Refresh (CBR) and Self Refresh
• Auto Refresh for temperatures above 85 °C
• Programmable self refresh rate via EMRS2 setting.
• Programmable partial array refresh via EMRS2 settings.
• DCC enabling via EMRS2 setting.
• All inputs and outputs SSTL_1.8 compatible
• Off-Chip Driver Impedance Adjustment (OCD) and On-Die
• Serial Presence Detect with E
• SO-DIMM Dimensions (nominal): 30 mm high, 67.6 mm
• Based on standard reference layouts Raw Cards 'A', 'C',
• RoHS compliant products
–667C
–5300C
4–4–4
200
333
333
12
12
45
57
–3
Termination (ODT)
wide
and 'E'
HYS64T[32/64/128]xxxHDL-[25F/2.5/3/3S/3.7/5]-B
–667D
5–5–5
–3S
–5300D
200
266
333
15
15
45
60
SO-DIMM DDR2 SDRAM Module
4–4–4
–3.7
–533C
–4200C
200
266
266
15
15
45
60
1)
2
PROM
Performance Table
Internet Data Sheet
–5
–400B
–3200B
3–3–3
200
200
15
15
40
55
TABLE 1
t
REFI
= 3.9 µs.
Unit
t
MHz
MHz
MHz
MHz
ns
ns
ns
ns
CK

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