KS8993F Micrel Inc, KS8993F Datasheet - Page 33

• Manufacturer Part Number: KS8993F
• Description: IC CONV MED 10/100 3PORT 128PQFP
• Manufacturer: Micrel Inc

Specifications of KS8993F

• Applications: *
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Number Of Primary Switch Ports: 3
• Internal Memory Buffer Size: 32
• Operating Supply Voltage (typ): 1.8/2.5/3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII/SNI
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 1.89/3.465V
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: KS8993F-EVAL - EVAL KIT EXPERIMENTAL KS8993F
• Lead Free Status / RoHS Status: Not Compliant, Lead free / RoHS Compliant

The KS8993F will not forward the following packets:
2.4.6 Switching Engine
The KS8993F features a high-performance switching engine to move data to and from the MAC using built-in frame
buffers. It operates in store and forward mode, while the efficient switching mechanism reduces overall latency.
The KS8993F has a 32KB internal frame buffer. This resource is shared between all three ports. The buffer sharing
mode can be programmed through Global Register 2 (0x02). In one mode, ports are allowed to use any free buffers in
the buffer pool. In the second mode, each port is only allowed to use 1/3 of the total buffer pool. There are a total of
250 buffers available. Each buffer is 128 bytes in size.
2.4.7 MAC operation
The KS8993F strictly abides by IEEE 802.3 standards to maximize compatibility.
Inter Packet Gap (IPG)
If a frame is successfully transmitted, the 96-bit time IPG is measured between the two consecutive MTXEN. If the
current packet is experiencing collision, the 96-bit time IPG is measured from MCRS and the next MTXEN.
2.4.8 Back-off Algorithm
The KS8993F implements the IEEE Standard 802.3 binary exponential back-off algorithm, and optional "aggressive
mode" back-off. After 16 collisions, the packet will be optionally dropped depending on the chip configuration in Global
Register 3 (0x03).
2.4.9 Late Collision
If a transmit packet experiences collisions after 512 bit times of the transmission, the packet will be dropped.
2.4.10 Illegal Frames
The KS8993F discards frames less than 64 bytes long and can be programmed to accept frames up to 1536 bytes long
in Global Register 4 (0x04). For special applications, the KS8993F can also be programmed to accept frames up to
1916 bytes long in the same global register. Since the KS8993F supports VLAN tags, the maximum sizing is adjusted
when these tags are present.
2.4.11 Flow Control
The KS8993F supports standard 802.3x flow control frames on both transmit and receive sides.
On the receive side, if the KS8993F receives a pause control frame, the KS8993F will not transmit the next normal
frame until the timer, specified in the pause control frame, expires. If another pause frame is received before the
current timer expires, the timer will be updated with the new value from the second pause frame. During this period
(being flow controlled), only flow control packets from the KS8993F will be transmitted.
Micrel, Inc.
June 2009
1. Error packets. These include framing errors, FCS errors, alignment errors, and illegal size packet errors.
2. 802.3x pause frames. The KS8993F will intercept these packets and perform the appropriate actions.
3. “Local" packets. Based on Destination Address (DA) look up, if the destination port from the look up table
matches the port where the packet was from, the packet is defined as "local".
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