KS8695X Micrel Inc, KS8695X Datasheet - Page 16

IC SWITCH 10/100 5PORT 208PQFP

KS8695X

Manufacturer Part Number
KS8695X
Description
IC SWITCH 10/100 5PORT 208PQFP
Manufacturer
Micrel Inc
Datasheet

Specifications of KS8695X

Applications
*
Mounting Type
Surface Mount
Package / Case
208-MQFP, 208-PQFP
For Use With
KS8695-EVAL - EVAL KIT EXPERIMENTAL KS8695576-1005 - BOARD EVAL EXPERIMENT KS8695X
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Manufacturer
Quantity
Price
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TI
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Part Number:
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Manufacturer:
Micrel Inc
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Company:
Part Number:
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KS8695X
Signal Description
System Level Hardware Interfaces
At the system level the KS8695X features the following interfaces:
• Clock interface for crystal or external oscillator
• JTAG development interface
• One WAN Ethernet physical interface
• Four LAN Ethernet physical interfaces
• PHY LED drivers
• One high-speed UART interface
• Eight GPIO pins
• Advanced memory interface
• Factory test
• Power and ground
Configuration Pins
Reset
The KS8695X has a single reset input that can be driven by a system reset circuit or a simple power on reset circuit. The
KS8695X also features a reset output (WRSTO) that can be used to reset other devices in the system. WRSTO can be
configured as either an active high reset or an active low reset through a strap-in option on pin 85 as shown in Table 1. The
KS8695X also has a built in watchdog timer. Once the user programs the watchdog timer and the timer setting expires, the
KS8695X will reset itself and also assert WRSTO to reset the other devices in the system. Figure 3 shows a typical system
that uses the KS8695X WRSTO as the system reset.
M9999-102604
– Programmable synchronous bus rate
– Programmable asynchronous interface timing
– Independently programmable data bus width for static and synchronous memory
– Glueless connection to SDRAM
– Glueless connection to flash memory or ROM
Configuration
Bank0 Flash Data Width
WRSTO Polarity
CPU Clock Select
Clock and Reset
WAN Ethernet
LAN Ethernet
Factory Test
PHY LED
Drivers
JTAG
PHY
PHY
Pin Name
B0SIZE[1:0]
EROEN/WRSTPLS
URTSN/CPUCLKSEL
Figure 2. System Level Interfaces
Table 1. Configuration Pins
KS8695X
16
Pin #
118,119
85
96
Settings
‘00’= reserved
‘01’ = byte wide
‘10’ = half word wide (16 bits)
‘11’ = word wide (32 bits)
‘0’ = active high
‘1’ = active low
‘0’ = normal mode (PLL)
'1’ = bypass internal PLL
UART
Interface
Ground
GPIO
Advanced
Memory
Power and
October 2004
Micrel

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