KS8695X Micrel Inc, KS8695X Datasheet

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... JTAG debug- ging interface. Complete hardware and software reference designs are available. The KS8695X represents a new level of total solution opti- mized for broadband gateway system development and renders speedy routing performance and connectivity inter- faces for value-added networking expansions. ...

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... KS8695X Features • The CENTAUR KS8695X featuring XceleRouter tech- nology is a single-chip multi-port gateway-on-a-chip with all the key components integrated for a high-perfor- mance and low-cost broadband gateway • ARM922T High-Performance CPU Core – ARM922T core at 166MHz – 8KB I-cache and 8KB D-cache – ...

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... KS8695X Revision History Revision Date Summary of Changes 1.00 05/24/04 Created. 1.01 06/17/04 Updated System Clock. 1.02 10/26/04 Updated Timing Diagrams: SRAM Read and Write, SDRAM Read and Write, and External I/O Read/Write Cycles. October 2004 3 Micrel M9999-102604 ...

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... KS8695X Contents System Level Applications .............................................................................................................................................................. 5 Pin Description ................................................................................................................................................................................. 6 Pin Configuration ........................................................................................................................................................................... 13 Functional Description .................................................................................................................................................................. 14 Introduction .............................................................................................................................................................................. 14 CPU Features .......................................................................................................................................................................... 14 Advanced Memory Controller Features ................................................................................................................................... 14 Direct Memory Access (DMA) Engines ................................................................................................................................... 14 XceleRouter™ Technology ...................................................................................................................................................... 14 Switch Engine .......................................................................................................................................................................... 15 Network Interface .................................................................................................................................................................... 15 Peripherals .............................................................................................................................................................................. 15 Other Features ........................................................................................................................................................................ 15 Signal Description .......................................................................................................................................................................... 16 System Level Hardware Interface ............................................................................................................................................ 16 Configuration Pins ................................................................................................................................................................... 16 Reset ...

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... WAN 8KB Core DMA D-Cache FIFO Arbiter External I/O Interface Wireless LAN 11b Coprocessor USB Host DSP Controller Voice Coding Figure 1. KS8695X Applications 5 PCs Servers 4P LAN I/F ™ WLAN 10/100 TX AP Auto MDI-X Switch IP Phone FIFO LED I/F LEDs LAN DMA ...

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... KS8695X Pin Description Pin Number Pin Name Type 1 VDD-IO 2 VSS-IO Gnd 3 ADDR10 4 ADDR9 5 ADDR8 6 ADDR7 7 ADDR6 8 ADDR5 9 ADDR4 10 ADDR3 11 VDD-IO 12 VSS-IO Gnd 13 ADDR2 14 ADDR1 15 ADDR0 16 SDCSN1 17 SDCSN0 18 SDRASN 19 SDCASN 20 SDWEN 21 VDD-IO 22 VSS-IO Gnd 23 SDOCLK 24 SDICLK 25 VDD-CORE 26 VSS-CORE Gnd 27 SDQM3 28 SDQM2 29 SDQM1 ...

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... KS8695X Pin Description Pin Number Pin Name Type 33 DATA29 34 VDD-IO 35 VSS-IO Gnd 36 DATA28 37 DATA27 38 DATA26 39 DATA25 40 DATA24 41 DATA23 42 DATA22 43 VDD-CORE 44 VSS-CORE Gnd 45 DATA21 46 DATA20 47 VDD-IO 48 VSS-IO Gnd 49 DATA19 50 DATA18 51 DATA17 52 DATA16 53 VDD-IO 54 VSS-IO Gnd 55 DATA15 56 DATA14 57 DATA13 58 DATA12 59 DATA11 60 DATA10 61 DATA9 ...

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... KS8695X Pin Number Pin Name Type 66 DATA6 67 DATA5 68 DATA4 69 DATA3 70 DATA2 71 DATA1 72 DATA0 73 VDD-IO 74 VSS-IO Gnd 75 ECSN2 76 ECSN1 77 ECSN0 78 EWAITN 79 VDD-IO 80 VSS-IO Gnd 81 RCSN1 82 RCSN0 83 WRSTO 84 TEST3 85 EROEN/ WRSTPLS 86 ERWEN3/ TICTESTENN 87 ERWEN2/ TESTREQA 88 ERWEN1/ TESTREQB 89 ERWEN0/ TESTACK 90 VDD-CORE 91 VSS-CORE Gnd 92 URXD ...

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... KS8695X Pin Number Pin Name Type 95 UDSRN 96 URTSN/ CPUCLKSEL 97 UCTSN/ BISTEN 98 UDCDN/ SCANEN 99 URIN/ TSTRST 100 GPIO7 101 GPIO6 102 GPIO5/ TOUT1 103 VDD-IO 104 VSS-IO Gnd 105 GPIO4/ TOUT0 106 GPIO3/ EINT3 107 GPIO2/ EINT2 108 GPIO1/ EINT1 109 GPIO0/ ...

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... KS8695X Pin Number Pin Name Type 120 L4LED1/ DBGAD7 121 L4LED0/ DBGAD6 122 L3LED1/ DBGAD5 123 L3LED0/ DBGAD4 124 L2LED1/ DBGAD3 125 L2LED0/ DBGAD2 126 L1LED1/ DBGAD1 127 L1LED0/ DBGAD0 128 VDD-CORE 129 VSS-CORE Gnd 130 TEST4 131 TEST5 132 TEST6 ...

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... P = Power supply Input Output. I/O = Bidirectional connect. October 2004 (1) Pin Function NC This pin must be left as no connect. I KS8695X Chip Reset. Active Low. I PHY Test Pin (factory test signal). I External Clock In. I External Clock In (negative polarity). P 1.8V Analog V for PLL. DD Analog Ground. ...

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... KS8695X Pin Number Pin Name Type 179 VDDAT 180 LANRXP3 181 LANRXM3 182 GNDA Gnd 183 LANTXM3 184 LANTXP3 185 GNDA Gnd 186 VDDAR 187 LANRXP4 188 LANRXM4 189 GNDA Gnd 190 LANTXM4 191 LANTXP4 192 GNDA Gnd 193 VDDAR 194 ...

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... KS8695X Pin Configuration 156 VDDAR WANFXSD/DOUT WANRXP WANRXM GNDA WANTXM WANTXP GNDA LANRXP1 LANRXM1 GNDA LANTXM1 LANTXP1 VDDAR GNDA ISET VDDAT LANRXP2 LANRXM2 GNDA LANTXM2 LANTXP2 VDDAT LANRXP3 LANRXM3 GNDA LANTXM3 LANTXP3 GNDA VDDAR LANRXP4 LANRXM4 GNDA LANTXM4 LANTXP4 GNDA VDDAR ...

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... KS8695X to perform full non-blocking frame switching and/or routing. There are five MAC units in the KS8695X: four are for LAN and one is for the WAN. Connected to the LAN and WAN MACs are five 10/100 PHYs. These PHYs use Micrel’s patented low-power analog PHY technology to achieve increased performance ...

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... KS8695X Switch Engine • 5-port 10/100 Integrated switch with one WAN and four LAN physical layer transceivers • 16Kx32 on-chip SRAM for frame buffering • 1.4Gbps on-chip memory bandwidth for wire-speed frame switching • 10Mbps, 100Mbps modes of operations for both full and half duplex • ...

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... URTSN/CPUCLKSEL Reset The KS8695X has a single reset input that can be driven by a system reset circuit or a simple power on reset circuit. The KS8695X also features a reset output (WRSTO) that can be used to reset other devices in the system. WRSTO can be configured as either an active high reset or an active low reset through a strap-in option on pin 85 as shown in Table 1. The KS8695X also has a built in watchdog timer ...

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... The clock to the KS8695X can be supplied by either a 25MHz ±50ppm crystal oscillator oscillator is used it shall be connected to the X1 input (pin 150) on the KS8695X crystal is used, it shall be connected with a circuit like the one shown below. The 25MHz input clock is used by an internal PLL to generate the programmable SDOCLK. SDOCLK is the system clock, and can be programmed from 25MHz to 125MHz using system clock and bus control register at offset 0x0004 ...

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... CPU clock source. KS8695X chip reset. Active low input asserted for at least 256 system clock (40ns) cycles to reset the KS8695X. When in the reset state, all the output pins are tri-stated and all open drain signals are floating. Watchdog timer reset output. This signal is asserted for at least 200ms if RESETN is asserted or when the internal watchdog timer expires ...

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... KS8695X LAN Ethernet Physical Interface Pins Pin Name I/O Type 187 LANRXP[4:1] I 180 174 165 188 LANRXM[4:1] I 181 175 166 191 LANTXP[4:1] O 184 178 169 190 LANTXM[4:1] O 183 177 168 172 ISET I PHY LED Drivers Pin Name I/O Type 119 WLED0/ ...

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... KS8695X UART Pins Pin Name I/O Type 92 URXD I 94 UTXD O 93 UDTRN/ O DBGENN 95 UDSRN I 96 URTSN/ O/I CPUCLKSEL 97 UCTSN/ I BISTEN 98 UDCDN/ I SCANEN 99 URIN/ I TSTRST General Purpose I/O Pins Pin Name I/O Type 109 GPIO0/ I/O EINT0 108 GPIO1/ I/O EINT1 107 ...

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... KS8695X Reserved Pins Pin Name I/O Type( 84 TEST3 NC 130 TEST4 NC 131 TEST5 NC 132 TEST6 NC 133 TEST7 NC 134 TEST8 NC 135 TEST9 NC 136 TEST10 NC 139 TEST11 NC 140 TEST12 NC 141 TEST13 NC 142 TEST14 NC 143 TEST15 NC 144 TEST16 NC 145 TEST17 NC 146 TEST18 NC 147 TEST19 NC Advanced Memory Interface (SDRAM/ROM/FLASH/SRAM/EXTERNAL I/O) ...

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... External DATA Bus. 32-bit bidirectional data bus for data transfer. KS8695X also supports 8- and 16-bit data bus widths. SDRAM Chip Select: Active low chip select pins for SDRAM. The KS8695X supports up to two SDRAM banks. One SDCSN output is provided for each bank. ...

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... ROM/SRAM/FLASH bank needs more access cycles than those defined in the corresponding control register. ROM/SRAM/FLASH chip select: Active low. The KS8695X can access up to two external ROM/SRAM/FLASH memory banks. The RCSN pins can be controlled to map the CPU addresses into physical memory banks. ...

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... KS8695X Power and Ground Pins Pin Name I/O Type 152 VDDA-PLL P 173 VDDAT P 179 154 VDDAR P 157 170 186 193 195 25 VDD-CORE 115 128 1 VDD- 103 137 26 VSS-CORE Gnd 44 91 116 129 2 VSS-IO Gnd 104 138 Note Power supply. Gnd = Ground. ...

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... KS8695X Pin Name I/O Type 153 GNDA Gnd 155 156 161 164 167 171 176 182 185 189 192 194 196 Note: 1. Gnd = Ground. October 2004 (1) Description Analog Ground. 25 Micrel M9999-102604 ...

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... Memory Map Example The default base address for the KS8695X system configuration registers is 0x03ff0000. After power up, the user is free to remap the memory for their specific application. The following is an example of the memory space remapped for operation. Address Range Region ...

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... KS8695X WAN DMA Registers Address Description 0x6000 WAN MAC DMA Transmit Control Register 0x6004 WAN MAC DMA Receive Control Register 0x6008 WAN MAC DMA Transmit Start Command Register 0x600C WAN MAC DMA Receive Start Command Register 0x6010 WAN Transmit Descriptor List Base Address Register ...

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... KS8695X LAN DMA Registers Address Description 0x8000 LAN MAC DMA Transmit Control Register 0x8004 LAN MAC DMA Receive Control Register 0x8008 LAN MAC DMA Transmit Start Command Register 0x8010 LAN Transmit Descriptor List Base Address 0x8014 LAN Receive Descriptor List Base Address ...

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... KS8695X UART Registers Address Description 0xE000 UART Receive Buffer Register 0xE004 UART Transmit Holding Register 0xE008 UART FIFO Control Register 0xE00C UART Line Control Register 0xE010 UART Modem Control Register 0xE014 UART Line Status Register 0xE018 UART Modem Status Register 0xE01C ...

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... KS8695X Switch Engine Configuration Registers Address Description 0xE800 Switch Engine Control 0 Register 0xE804 Switch Engine Control 1 Register 0xE808 Port 1 Configuration Register 0xE80C Port 2 Configuration Register 0xE810 Port 3 Configuration Register 0xE814 Port 4 Configuration Register 0xE818 Port 5 Configuration Register 0xE81C Ports 1 and 2 Auto Negotiation (AN) Register ...

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... KS8695X Absolute Maximum Ratings Supply Voltage ( ................ –0.5V to +2.4V DDAR DDA_PLL DD_CORE ( ...................................... –0.5V to +4.0V DDAT DD_IO Input Voltage (all inputs) ............................. –0.5V to +4.0V Output Voltage (all outputs) ........................ –0.5V to +4.0V Lead Temperature (soldering, 10sec.) ..................... 270°C Storage Temperature (T ) ....................... –55°C to +150°C S Electrical Characteristics ...

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... KS8695X Symbol Parameter 100BASE-TX Transmit (measured differentially after 1:1 transformer) V Peak Differential Output Voltage O V Output Voltage Imbalance IMB Rise/Fall Time r t Rise/Fall Time Imbalance 100BASE-TX Transmit (measured differentially after 1:1 transformer) Duty Cycle Distortion Overshoot V Reference Voltage of ISET SET Output Jitters ...

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... KS8695X LDO Options For a standalone SOHO system using the KS8695X, Micrel recommends the following low-cost LDO bundle: • One MIC5209BM for the +1.8V digital supply (V • One MIC5209-3.3BS for the +3.3V digital I/O supply (V Since each system may have a different power requirement, be sure to contact your Micrel sales representative or Field Application Engineer to help you find a cost-effective LDO solution for your project ...

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... KS8695X Timing Diagrams Supply Voltages RESETN Strap-In Strap-In Pin Output Symbol Parameter t Stable supply voltages to reset high SR t Configuration set-up time CS t Configuration hold time CH t Reset to strap-in pin output RC M9999-102604 tsr tch tcs trc Figure 6. Reset Timing Table 2. Reset Timing Parameters ...

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... KS8695X Symbol Parameter T Valid address to CS setup time cta T OE valid to CS setup time cos T Address access time aac T Valid read data to OE setup time dsu T CS valid to WE setup time cws T Address to CS hold time cah T Rising edge hold time ...

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... KS8695X Symbol Parameter T Valid address to CS setup cta T CS valid to OE setup time cos T Valid read data to OE setup time dsu T CS valid to WE setup time cws write data hold time ADDR hold time cah T OE/WE pulsewidth oew T T Rising edge OE/ hold time ...

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... KS8695X Symbol Parameter Programmable SDRAM RAS to CASE Latency SDTRC SDCAS Programmable SDRAM CAS Latency October 2004 Figure 10. SDRAM Read Timing Figure 11. SDRAM Write Timing Table 7. SDRAM Timing Parameters 37 Micrel Registers 0x4038 0x4038 M9999-102604 ...

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... KS8695X Symbol Parameter SDRAM Signals Rise Time SDR Clock rise time SDR Address rise time SDR Bank select rise time SDR Data rise time SDR Chip select rise time SDR RAS rise time SDR CAS rise time SDR WE rise time SDR ...

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... KS8695X Package Information MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA + 1 (408) 944-0800 TEL The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. ...