IDT72P51777L6BB IDT, Integrated Device Technology Inc, IDT72P51777L6BB Datasheet - Page 28
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IDT72P51777L6BB
Manufacturer Part Number
IDT72P51777L6BB
Description
IC FLOW CTRL 40BIT 376-BGA
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.IDT72P51767L7-5BB.pdf
(88 pages)
Specifications of IDT72P51777L6BB
Configuration
Dual
Access Time (max)
3.7ns
Word Size
36b
Sync/async
Synchronous
Expandable
Yes
Bus Direction
Uni-Directional
Clock Freq (max)
166MHz
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
72P51777L6BB
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
IDT72P51777L6BB
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
TABLE 7 — PARALLEL PROGRAMMING MODE QUEUE CONFIGURATION
EXAMPLE
NOTE:
1. Users can also program 6 different settings in Default Programming mode using QSEL[2:0] and DFM pins instead of using Parallel Programming Mode.
unlimited number of devices. As Figure 5 shows, the WRADD[7] and RDADD[7]
will act as the Write Chip Select Enable and Read Chip Select Enable
respectively, and the user can then decode each Multi-Queue device sepa-
rately using these pins and still maintain 128 Queues per device. The
WRADD[6:0] and RDADD[6:0] can still be routed as shared buses to each
device, as can write and read data buses and external control pins and flags.
IDT72P51767/72P51777 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES
(128 QUEUES) 40 BIT WIDE CONFIGURATION 5,898,240 and 11,796,480 bits
WRADD/RDADD[7:0]
128 Queues/Device
64 Queues/Device
32 Queues/Device
16 Queues/Device
8 Queues/Device
4 Queues/Device
1 Queue/Device
This table above shows how a user might program the number of queues in the device and can program any 1-128 queues in the device by using
the WRADD/RDADD[7:0] pins.
The 10G Multi-Queue also has the capability of expanded theoretically to
(1)
D_BUS
WCLK
/WEN
WADDR<6:0>
W_A7_M
(/WCS0)
W_A7_S2
(!/WCS2)
W_A7_S1
(!/WCS1)
Figure 5. Expansion for Unlimited Number of Multi-Queue Devices Example
7
x
x
x
x
x
x
x
6
1
0
0
0
0
0
0
W_A[6:0]
W_A[6:0]
W_A7
W_A7
DIN
DIN
W_A[6:0]
W_A[6:0]
W_A7
W_A7
DIN
DIN
W_A[6:0]
W_A[6:0]
W_A7
W_A7
DIN
DIN
WCLK
WCLK
/WEN
/WEN
WCLK
WCLK
/WEN
/WEN
WCLK
WCLK
/WEN
/WEN
5
1
1
0
0
0
0
0
Slave1
ID=101
Slave2
ID=110
Master
ID=000
28
To make this possible the ID pin, ID2 of all slave devices must be connected to
“1” and the Master device ID Pins, ID[2:0], should equal 000. It is not recommend
expanding greater than 10 devices because sufficient capacitive loading on
each bus makes it diffcult to drive a greater multiple of devices per bus. The real
WCS and RCS pins can be tied to a ground plane on the board to save FPGA
pins.
4
1
1
1
0
0
0
0
R_A[6:0]
R_A[6:0]
R_A[6:0]
R_A[6:0]
R_A[6:0]
R_A[6:0]
RCLK
RCLK
/REN
/REN
R_A7
R_A7
QOUT
QOUT
RCLK
RCLK
/REN
/REN
R_A7
R_A7
QOUT
QOUT
RCLK
RCLK
/REN
/REN
R_A7
R_A7
QOUT
QOUT
3
1
1
1
1
0
0
0
2
1
1
1
1
1
0
0
1
1
1
1
1
1
1
0
COMMERCIAL AND INDUSTRIAL
0
1
1
1
1
1
1
0
TEMPERATURE RANGES
FEBRUARY 11, 2009