IDT88P8342BHI IDT, Integrated Device Technology Inc, IDT88P8342BHI Datasheet - Page 60
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IDT88P8342BHI
Manufacturer Part Number
IDT88P8342BHI
Description
IC SPI3-SPI4 EXCHANGE 820-PBGA
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.IDT88P8342BHGI.pdf
(98 pages)
Specifications of IDT88P8342BHI
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
88P8342BHI
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the DAT_PAR_ERR bit field. The LP affected by these two parity error bit fields
is enumerated in the PORT_ADDRESS field. The bit fields of SPI-3 egress test
register are described. The bit fields are automatically cleared following the
generation of the associated error.
3 egress LP through the ADD_PAR_ERR bit field. The LP affected by the
ADD_PAR_ERR bit field is enumerated in the PORT_ADDRESS field.
egress LP through the DAT_PAR_ERR bit field. The LP affected by the
DAT_PAR_ERR bit field is enumerated in the PORT_ADDRESS field.
the DAT_PAR_ERR bit fields is enumerated in the PORT_ADDRESS field. The
value of the PORT_ADDRESS is set from 0x00 to 0xFF.
SPI-3 egress fill level register (Block_base 0x0700
+ Register_offset 0x03)
TABLE 58 - SPI-3 EGRESS FILL LEVEL REGISTER
(REGISTER_OFFSET=0x03)
IDT88P8342 SPI EXCHANGE 2 x SPI-3 TO SPI-4
Reserved
E_FCLK_AV
ADD_PAR_ERR
DAT_PAR_ERR
PORT_ADDRESS
FILL_CUR
Field
0=No parity error introduced
1=Introduce a single address parity error on a SPI-3 egress LP
0=No parity error introduced
1=Introduce a single data parity error on a SPI-3 egress LP
A single address parity error is introduced on a SPI-
A single data parity error is introduced on a SPI-3
The LP affected by both the ADD_PAR_ERR and
Bits
3:0
5
4
Length
4
1
1
Initial Value
0x0
0x0
0b0
60
Each register has read-only access. The bit fields of the SPI-3 egress fill level
register are described.
register, the value read from it will change rapidly and is used for internal
diagnostics only.
SPI-3 egress max fill level register (Block_base
0x0700 + Register_offset 0x04)
TABLE 59 - SPI-3 EGRESS MAX FILL LEVEL REGIS-
TER (REGISTER_OFFSET=0x04)
register has read-only access, and is cleared after reading. 0xF is the highest
filling level, meaning all egress buffers had been full at some time since the last
read of the FILL_MAX field. The units of FILL_MAX are one-sixteenth of the
available egress buffering. Each unit is equal to 128 bytes. The bit field of the
SPI-3 egress max fill Level register is described.
of the SPI-3 egress Max Fill Level Register
There is one register for SPI-3 egress fill level register per SPI-3 interface.
FILL_CUR
I_FCLK_AV Current SPI-3 egress clock availability is checked here.
There is one register for SPI-3 egress max fill Level per SPI-3 interface. Each
FILL_MAX
FILL_MAX
Field
Current SPI-3 egress buffer fill level. Since this is a real-time
0=SPI-3 egress clock transitions were not detected on a
SPI-3 port
1=SPI-3 egress clock transitions were detected on a SPI-
3 port
Maximum SPI-3 egress buffer fill level since the last read
Bits
3:0
INDUSTRIAL TEMPERATURE RANGE
Length
4
Initial Value
APRIL 10, 2006
0x0
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