IDT72V51546L6BB8 IDT, Integrated Device Technology Inc, IDT72V51546L6BB8 Datasheet - Page 44

• Manufacturer Part Number: IDT72V51546L6BB8
• Description: IC FLOW CTRL MULTI QUEUE 256-BGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT72V51546L6BB8

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 72V51546L6BB8

NOTES:
1. The purpose of the Null queue operation is so that the user can stop reading a block (packet) of data from a queue without filling the 2 stage output pipeline with the next words
2. Please see Figure 21, Null Queue Flow Diagram.
Cycle:
*A* Null Q of device 0 (33rd queue) is selected, when word Wn-1 from previously selected Q1 is read.
*B* REN is HIGH and Wn (Last Word of the Packet) of Q1 is pipelined onto the O/P register.
*C* The Null Q is seen as an empty Queue on the read side, therefore Wn of Q1 remains in the O/P register and OV goes HIGH.
*D* A new Q, Q4 is selected and the 1st word of Q4 will fall through present on the O/P register on cycle *F*.
IDT72V51546/72V51556 3.3V, MULTI-QUEUE FLOW-CONTROL DEVICES
(32 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648 and 2,359,296 bits
Q1
Wn
Qn
Wn-1
RDADD
RADEN
from that queue.
RCLK
Note: *B* and *C* are a minimum 2 RCLK cycles between Q selects.
Qout
REN
Queue 1
Memory
O/P Reg.
OV
*A*
Q1 Wn-3
Q1
Wn
Q1
Wn
O/P Reg.
Queue
*B*
t
Null
A
t
t
QS
Q1 Wn-2
AS
NULL QUEUE
00100000
SELECT
*A*
Figure 20. Read Operation and Null Queue Select
t
ENH
t
A
t
t
AH
Q1
Wn
QH
Q1
Wn
Figure 21. Null Queue Flow Diagram
Q1 Wn-1
O/P Reg.
Queue
*C*
Null
*B*
t
A
44
Q1
Wn
Q1
Wn
*C*
O/P Reg.
Queue
*D*
Null
t
ROV
t
t
AS
QS
NEW QUEUE
00000100
SELECT
*D*
Q1 Wn
t
Q1
Wn
t
Q4
W0
AH
QH
t
ENS
Queue 4
Memory
O/P Reg.
COMMERCIAL AND INDUSTRIAL
*E*
*E*
TEMPERATURE RANGES
t
ROV
Q4
W0
*F*
Q4
W1
Queue 4
Memory
O/P Reg.
t
*F*
A
5904 drw24
Q4 W0
FWFT
5904 drw23