IDT89HPES5T5ZBBCG IDT, Integrated Device Technology Inc, IDT89HPES5T5ZBBCG Datasheet - Page 12

• Manufacturer Part Number: IDT89HPES5T5ZBBCG
• Description: IC PCI SW 5LANE 5PORT 196-CABGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT89HPES5T5ZBBCG

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 89HPES5T5ZBBCG

IDT 89PES5T5 Data Sheet
T
MAX JITTER
T
ENTER TIME
T
1.
RX-EYE-MEDIUM TO
RX-IDLE-DET-DIFF-
RX-SKEW
Parameter
Minimum, Typical, and Maximum values meet the requirements under PCI Specification 1.1
GPIO (synchronous output)
GPIO (asynchronous input)
Max time between jitter median & max deviation
Unexpected Idle Enter Detect Threshold Integration Time
Lane to lane input skew
GPIO
GPIO[10:0]
1.
they are asynchronous.
2.
GPIO signals must meet the setup and hold times if they are synchronous or the minimum pulse width if
The values for this symbol were determined by calculation, not by testing.
Signal
1
EXTCLK
Description
Table 10 PCIe AC Timing Characteristics (Part 2 of 2)
Symbol
Tpw_13b
Table 11 GPIO AC Timing Characteristics
Figure 5 GPIO AC Timing Waveform
2
Reference
Edge
12 of 28
None
Tdo_13a
Tpw_13b
Min Max Unit
50
Min
—
1
ns
Typical
Tdo_13a
Reference
See Figure 5.
Diagram
Timing
1
Max
0.3
10
20
1
Units
ms
UI
ns
May 7, 2009