LTC3731HG#PBF Linear Technology, LTC3731HG#PBF Datasheet - Page 21

• Manufacturer Part Number: LTC3731HG#PBF
• Description: IC SW REG CTRLR SYNC BUCK 36SSOP
• Manufacturer: Linear Technology
• Series: PolyPhase®r
• Type: Step-Down (Buck)r

Specifications of LTC3731HG#PBF

• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Number Of Outputs: 1
• Voltage - Output: 0.6 ~ 6 V
• Frequency - Switching: 225kHz ~ 680kHz
• Voltage - Input: 4 ~ 36 V
• Operating Temperature: -40°C ~ 140°C
• Mounting Type: Surface Mount
• Package / Case: 36-SSOP
• Primary Input Voltage: 7V
• No. Of Outputs: 1
• Output Voltage: 32V
• Output Current: 5A
• No. Of Pins: 36
• Operating Temperature Range: 0°C To +70°C
• Msl: MSL 1 - Unlimited
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output: -
• Power - Output: -

applicaTions inForMaTion
Efficiency Considerations
The percent efficiency of a switching regulator is equal to the
output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can
be expressed as:
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Checking Transient Response
The regulator loop response can be checked by look-
ing at the load transient response. Switching regulators
take several cycles to respond to a step in DC (resistive)
load current. When a load step occurs, V
amount equal to ∆I
series resistance of C
discharge C
forces the regulator to adapt to the current change and
return V
time, V
ringing, which would indicate a stability problem. The
availability of the I
of control loop behavior, but also provides a DC-coupled
and AC-filtered closed-loop response test point. The DC
step, rise time and settling at this test point truly reflects
the closed-loop response. Assuming a predominantly
second order system, phase margin and/or damping fac-
tor can be estimated using the percentage of overshoot
seen at this pin. The bandwidth can also be estimated
by examining the rise time at the pin. The I
components shown in the Figure 1 circuit will provide an
adequate starting point for most applications.
%Efficiency = 100% – (L1 + L2 + L3 + ...)
OUT
OUT
can be monitored for excessive overshoot or
OUT
to its steady-state value. During this recovery
, generating the feedback error signal that
LOAD
TH
OUT
pin not only allows optimization
• ESR, where ESR is the effective
. ∆I
LOAD
also begins to charge or
OUT
shifts by an
TH
external
The I
loop compensation. The values can be modified slightly
(from 0.2 to 5 times their suggested values) to maximize
transient response once the final PC layout is done and
the particular output capacitor type and value have been
determined. The output capacitors need to be decided upon
because the various types and values determine the loop
feedback factor gain and phase. An output current pulse
of 20% to 80% of full load current having a rise time of
<2µs will produce output voltage and I
that will give a sense of the overall loop stability without
breaking the feedback loop. The initial output voltage step,
resulting from the step change in output current, may
not be within the bandwidth of the feedback loop, so this
signal cannot be used to determine phase margin. This is
why it is better to look at the I
feedback loop and is the filtered and compensated control
loop response. The gain of the loop will be increased by
increasing R
creased by decreasing C
factor that C
kept the same, thereby keeping the phase the same in the
most critical frequency range of the feedback loop. The
output voltage settling behavior is related to the stability
of the closed-loop system and will demonstrate the actual
overall supply performance.
A second, more severe transient is caused by switching
in loads with large (>1µF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with C
alter its delivery of current quickly enough to prevent this
sudden step change in output voltage if the load switch
resistance is low and it is driven quickly. If C
than 2% of C
so that the load rise time is limited to approximately
1000 • R
R
the charging current to about 1A.
SENSE
TH
OUT
resistor would require a 500µs rise time, limiting
SENSE
series R
, causing a rapid drop in V
OUT
C
C
. is decreased, the zero frequency will be
• C
and the bandwidth of the loop will be in-
, the switch rise time should be controlled
C
LOAD
-C
C
. Thus a 250µF capacitor and a 2mΩ
filter sets the dominant pole-zero
C
. If R
TH
C
is increased by the same
pin signal which is in the
OUT
LTC3731H
TH
. No regulator can
pin waveforms
LOAD
is greater

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