LTC3862HFE#PBF Linear Technology, LTC3862HFE#PBF Datasheet - Page 19

IC CTRLR DC/DC MULTI-PH 24TSSOP

LTC3862HFE#PBF

Manufacturer Part Number
LTC3862HFE#PBF
Description
IC CTRLR DC/DC MULTI-PH 24TSSOP
Manufacturer
Linear Technology
Type
Step-Up (Boost)r
Datasheet

Specifications of LTC3862HFE#PBF

Internal Switch(s)
No
Synchronous Rectifier
No
Number Of Outputs
1
Voltage - Output
1.22 ~ 200 V
Current - Output
50mA
Frequency - Switching
300kHz
Voltage - Input
4 ~ 36 V
Operating Temperature
-40°C ~ 150°C
Mounting Type
Surface Mount
Package / Case
24-TSSOP Exposed Pad, 24-eTSSOP, 24-HTSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-
LTC3862 chip, connect all of the SS pins together and use
one external capacitor to program the soft-start time. In
this case, the current into the soft-start capacitor will be
I
together. Figure 9 illustrates the start-up waveforms for a
2-phase LTC3862 application.
Pulse Skip Operation at Light Load
As the load current is decreased, the controller enters
discontinuous mode (DCM). The peak inductor current can
be reduced until the minimum on-time of the controller
is reached. Any further decrease in the load current will
cause pulse skipping to occur, in order to maintain output
regulation, which is normal. The minimum on-time of
the controller in this mode is approximately 180ns (with
the blanking time set to its minimum value), the majority
of which is leading edge blanking. Figure 10 illustrates
the LTC3862 switching waveforms at the onset of pulse
skipping.
Programmable Slope Compensation
For a current mode boost regulator operating in CCM,
slope compensation must be added for duty cycles above
50%, in order to avoid sub-harmonic oscillation. For the
LTC3862, this ramp compensation is internal and user
adjustable. Having an internally fi xed ramp compensation
waveform normally places some constraints on the value
of the inductor and the operating frequency. For example,
with a fi xed amount of internal slope compensation, using
OPERATION
SS
= n • 5μA, where n is the number of SS pins connected
50V/DIV
5V/DIV
5A/DIV
5A/DIV
Figure 9. Typical Start-Up Waveforms for a
Boost Converter Using the LTC3862
V
RUN
OUT
I
I
L1
L2
V
V
100Ω LOAD
IN
OUT
= 12V
= 48V
1ms/DIV
3862 F09a
an excessively large inductor would result in too much
effective slope compensation, and the converter could
become unstable. Likewise, if too small an inductor were
used, the internal ramp compensation could be inadequate
to prevent sub-harmonic oscillation.
The LTC3862 contains a pin that allows the user to program
the slope compensation gain in order to optimize perfor-
mance for a wider range of inductance. With the SLOPE
pin left fl oating, the normalized slope gain is 1.00. Con-
necting the SLOPE pin to ground reduces the normalized
gain to 0.625 and connecting this pin to the 3V8 supply
increases the normalized slope gain to 1.66.
With the normalized slope compensation gain set to 1.00,
the design equations assume an inductor ripple current of
20% to 40%, as with previous designs. Depending upon
the application circuit, however, a normalized gain of 1.00
may not be optimum for the inductor chosen. If the ripple
current in the inductor is greater than 40%, the normalized
slope gain can be increased to 1.66 (an increase of 66%)
by connecting the SLOPE pin to the 3V8 supply. If the
inductor ripple current is less than 20%, the normalized
slope gain can be reduced to 0.625 (a decrease of 37.5%)
by connecting the SLOPE pin to SGND.
To check the effectiveness of the slope compensation, apply
a load step to the output and monitor the cycle-by-cycle
behavior of the inductor current during the leading and
trailing edges of the load current. Vary the input voltage
over its full range and check for signs of cycle-by-cycle
SW node instability or sub-harmonic oscillation. When
10V/DIV
10V/DIV
1A/DIV
1A/DIV
SW1
SW2
I
I
Figure 10. Light Load Switching Waveforms for
the LTC3862 at the Onset of Pulse Skipping
L1
L2
V
V
LIGHT LOAD (10mA)
IN
OUT
= 17V
= 24V
1μs/DIV
LTC3862
3862 F10
19
3862fb

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