LT3825EFE#TRPBF Linear Technology, LT3825EFE#TRPBF Datasheet - Page 17

IC CNTRLR SYNC 16-TSSOP

LT3825EFE#TRPBF

Manufacturer Part Number
LT3825EFE#TRPBF
Description
IC CNTRLR SYNC 16-TSSOP
Manufacturer
Linear Technology
Type
Flybackr
Datasheet

Specifications of LT3825EFE#TRPBF

Internal Switch(s)
No
Synchronous Rectifier
Yes
Number Of Outputs
1
Frequency - Switching
50kHz ~ 250kHz
Voltage - Input
12 ~ 18 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP Exposed Pad, 16-eTSSOP, 16-HTSSOP
Power - Output
60W
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output
-
Voltage - Output
-

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APPLICATIONS INFORMATION
4. Compute:
5. Verify this result by connecting a resistor of this value
6. Disconnect the ground short to C
Setting Frequency
The switching frequency of the LT3825 is set by an
external capacitor connected between the OSC pin and
ground. Recommended values are between 200pF and
33pF , yielding switching frequencies between 50kHz and
250kHz. Figure 2 shows the nominal relationship between
external capacitance and switching frequency. Place the
capacitor as close as possible to the IC and minimize OSC
trace length and area to minimize stray capacitance and
potential noise pickup.
You can synchronize the oscillator frequency to an external
frequency. This is done with a signal on the SYNC pin. Set
the LT3825 frequency 10% slower than the desired external
frequency using the OSC pin capacitor, then use a pulse
on the SYNC pin of amplitude greater than 2V and with
the desired frequency. The rising edge of the SYNC signal
initiates an OSC capacitor discharge forcing primary MOS-
FET off (PG voltage goes low). If the oscillator frequency
is much different from the sync frequency, problems may
from the R
filter capacitor to ground. Measure the output imped-
ance R
in place. R
Fine tuning is accomplished experimentally by slightly
altering R
where R′
resistor, R
in place and R
load compensation (from step 2).
R
′ R
CMP
CMP
S(OUT)
= 1
= R
CMP
K
CMP
S(OUT)CMP
CMP
CMP
S(OUT)
= ΔV
is the new value for the load compensation
R
R
. A revised estimate for R
S(OUT)
S OUT
SENSE
pin to ground.
• 1+
(
OUT
should have decreased significantly.
is the output impedance with R
)
/ΔI
R
is the output impedance with no
S(OUT)CMP
R
R N
OUT
S(OUT)
1
with the new compensation
SF
CMP
and connect a 0.1μF
CMP
is:
CMP
occur with slope compensation and system stability. Keep
the sync pulse width greater than 500ns.
Selecting Timing Resistors
There are three internal “one-shot” times that are pro-
grammed by external application resistors: minimum
on-time, enable delay time and primary MOSFET turn-on
delay. These are all part of the isolated flyback control
technique, and their functions are previously outlined in
the Theory of Operation section.
The following information should help in selecting and/or
optimizing these timing values.
Minimum On-Time (t
Minimum on-time is the programmable period during which
current limit is blanked (ignored) after the turn on of the
primary-side switch. This improves regulator performance
by eliminating false tripping on the leading edge spike in
the switch, especially at light loads. This spike is due to
both the gate/source charging current and the discharge
of drain capacitance. The isolated flyback sensing requires
a pulse to sense the output. Minimum on-time ensures
that there is always a signal to close the loop.
The LT3825 does not employ cycle skipping at light loads.
Therefore, minimum on-time along with synchronous
rectification sets the switch over to forced continuous
mode operation.
300
200
100
50
Figure 2. f
30
OSC
ON(MIN)
vs OSC Capacitor Values
C
OSC
(pF)
)
100
3825 F02
200
LT3825
17
3825fc

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