LTC1871EMS-7 Linear Technology, LTC1871EMS-7 Datasheet - Page 9

IC MULTI CONFIG SYNC ADJ 10MSOP

LTC1871EMS-7

Manufacturer Part Number
LTC1871EMS-7
Description
IC MULTI CONFIG SYNC ADJ 10MSOP
Manufacturer
Linear Technology
Type
Step-Up (Boost), Flyback, Sepicr
Datasheet

Specifications of LTC1871EMS-7

Internal Switch(s)
No
Synchronous Rectifier
No
Number Of Outputs
1
Voltage - Output
1.23 ~ 36 V
Current - Output
50mA
Frequency - Switching
50kHz ~ 1MHz
Voltage - Input
6 ~ 36 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
10-MSOP, Micro10™, 10-uMAX, 10-uSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power - Output
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LTC1871EMS-7
Manufacturer:
LT
Quantity:
10 000
OPERATION
In applications where fi xed frequency operation is more
critical than low current effi ciency, or where the lowest
output ripple is desired, pulse-skip mode operation should
be used and the MODE/SYNC pin should be connected
to the INTV
mode (DCM) operation down to near the limit defi ned
by the chip’s minimum on-time (about 175ns). Below
this output current level, the converter will begin to skip
cycles in order to maintain output regulation. Figures 3
and 4 show the light load switching waveforms for Burst
Mode and pulse-skip mode operation for the converter
in Figure 1.
Burst Mode Operation
Burst Mode operation is selected by leaving the MODE/
SYNC pin unconnected or by connecting it to ground. In
normal operation, the range on the I
no load to full load is 0.30V to 1.2V. In Burst Mode opera-
tion, if the error amplifi er EA drives the I
0.525V, the buffered I
C1 will be clamped at 0.525V (which corresponds to 25%
of maximum load current). The inductor current peak is
then held at approximately 30mV divided by the power
MOSFET R
Burst Mode comparator B1 will turn off the power MOSFET
and scale back the quiescent current of the IC to 250μA
(sleep mode). In this condition, the load current will be
supplied by the output capacitor until the I
above the 50mV hysteresis of the burst comparator. At
light loads, short bursts of switching (where the average
50mV/DIV
5A/DIV
V
OUT
I
Figure 3. LTC1871-7 Burst Mode Operation
(MODE/SYNC = 0V) at Low Output Current
L
CC
DS(ON)
MODE/SYNC = 0V
(Burst Mode OPERATION)
pin. This allows discontinuous conduction
. If the I
TH
input to the current comparator
TH
10μs/DIV
pin drops below 0.30V, the
TH
pin corresponding to
TH
TH
18717 F03
voltage below
voltage rises
inductor current is 20% of its maximum value) followed
by long periods of sleep will be observed, thereby greatly
improving converter effi ciency. Oscilloscope waveforms il-
lustrating Burst Mode operation are shown in Figure 3.
Pulse-Skip Mode Operation
With the MODE/SYNC pin tied to a DC voltage above 2V,
Burst Mode operation is disabled. The internal, 0.525V
buffered I
pin to directly control the current comparator from no
load to full load. With no load, the I
0.30V, the power MOSFET is turned off and sleep mode
is invoked. Oscilloscope waveforms illustrating this mode
of operation are shown in Figure 4.
When an external clock signal drives the MODE/SYNC
pin at a rate faster than the chip’s internal oscillator, the
oscillator will synchronize to it. In this synchronized mode,
Burst Mode operation is disabled. The constant frequency
associated with synchronized operation provides a more
controlled noise spectrum from the converter, at the ex-
pense of overall system effi ciency of light loads.
When the oscillator’s internal logic circuitry detects a
synchronizing signal on the MODE/SYNC pin, the in-
ternal oscillator ramp is terminated early and the slope
compensation is increased by approximately 30%. As
a result, in applications requiring synchronization, it is
recommended that the nominal operating frequency of
the IC be programmed to be about 75% of the external
clock frequency. Attempting to synchronize to too high an
Figure 4. LTC1871-7 Low Output Current Operation with
Burst Mode Operation Disabled (MODE/SYNC = INTV
50mV/DIV
5A/DIV
V
OUT
TH
I
L
burst clamp is removed, allowing the I
MODE/SYNC = INTV
(PULSE SKIP MODE)
CC
2μs/DIV
TH
LTC1871-7
pin is driven below
18717 F04
CC
)
18717fc
9
TH

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