MAX1977EEI+ Maxim Integrated Products, MAX1977EEI+ Datasheet - Page 27

IC CNTRLR PS QUAD HI EFF 28QSOP

MAX1977EEI+

Manufacturer Part Number
MAX1977EEI+
Description
IC CNTRLR PS QUAD HI EFF 28QSOP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX1977EEI+

Applications
Controller, Notebook Computers
Voltage - Input
4.5 ~ 24 V
Number Of Outputs
4
Voltage - Output
3.3V, 5V, 2 ~ 5.5 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-QSOP
Output Voltage
3.3 V, 2 V to 5.5 V
Input Voltage
6 V to 24 V
Mounting Style
SMD/SMT
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Case
SSOP
Dc
06+
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Most of the following MOSFET guidelines focus on the
challenge of obtaining high load-current capability
(>5A) when using high-voltage (>20V) AC adapters.
Low-current applications usually require less attention.
Choose a high-side MOSFET (N1/N3) that has conduc-
tion losses equal to the switching losses at the typical
battery voltage for maximum efficiency. Ensure that the
conduction losses at the minimum input voltage do not
exceed the package thermal limits or violate the overall
thermal budget. Ensure that conduction losses plus
switching losses at the maximum input voltage do not
exceed the package ratings or violate the overall ther-
mal budget.
Choose a synchronous rectifier (N2/N4) with the lowest
possible R
high-side switch turning on due to parasitic drain-to-gate
capacitance, causing cross-conduction problems.
Switching losses are not an issue for the synchronous
rectifier in the buck topology, since it is a zero-voltage
switched device when using the buck topology.
Worst-case conduction losses occur at the duty factor
extremes. For the high-side MOSFET, the worst-case
power dissipation (PD) due to the MOSFET’s R
occurs at minimum battery voltage:
Generally, a small high-side MOSFET reduces switch-
ing losses at high input voltage. However, the R
required to stay within package power-dissipation limits
often limits how small the MOSFET can be. The opti-
mum situation occurs when the switching (AC) losses
equal the conduction (R
Switching losses in the high-side MOSFET can become
an insidious heat problem when maximum battery volt-
age is applied, due to the squared term in the CV
switching loss equation. Reconsider the high-side
MOSFET chosen for adequate R
voltages if it becomes extraordinarily hot when subject-
ed to V+
Calculating the power dissipation in N1/N3 due to
switching losses is difficult since it must allow for quan-
tifying factors that influence the turn-on and turn-off
times. These factors include the internal gate resis-
tance, gate charge, threshold voltage, source induc-
I
PD N N resis
(MAX)
LOAD
DS(ON)
Supply Controllers for Notebook Computers
(
High-Efficiency, Quad Output, Main Power-
1
2
.
/
×
. Ensure the gate is not pulled up by the
3
______________________________________________________________________________________
R
MOSFET Power Dissipation
DS ON
Power MOSFET Selection
(
tan
DS(ON)
)
ce
)
) losses.
=
DS(ON)
V
V
+
OUT
(
MIN
at low battery
_
)
⎟ ×
DS(ON)
DS(ON)
2
f
tance, and PC board layout characteristics. The follow-
ing switching loss calculation provides only a very
rough estimate and is no substitute for bench evalua-
tion, preferably including verification using a thermo-
couple mounted on N1/N3:
where C
N1/N3 and I
current.
For the synchronous rectifier, the worst-case power dis-
sipation always occurs at maximum battery voltage:
The absolute worst case for MOSFET power dissipation
occurs under heavy overloads that are greater than
I
the current limit and cause the fault latch to trip. To
protect against this possibility, “overdesign” the circuit
to tolerate:
where I
allowed by the current-limit circuit, including threshold
tolerance and resistance variation.
Current circulates from ground to the junction of both
MOSFETs and the inductor when the high-side switch is
off. As a consequence, the polarity of the switching
node is negative with respect to ground. This voltage is
approximately -0.7V (a diode drop) at both transition
edges while both switches are off (dead time). The drop
is I
The rectifier is a clamp across the synchronous rectifier
that catches the negative inductor swing during the dead
time between turning the high-side MOSFET off and the
synchronous rectifier on. The MOSFETs incorporate a
high-speed silicon body diode as an adequate clamp
diode if efficiency is not of primary importance. Place a
Schottky diode in parallel with the body diode to reduce
the forward voltage drop and prevent the N2/N4 MOSFET
body diodes from turning on during the dead time.
Typically, the external diode improves the efficiency by
1% to 2%. Use a Schottky diode with a DC current rating
equal to one-third of the load current. For example, use
LOAD(MAX)
L
x R
I
LOAD
PD N N
DS(ON)
LIMIT(HIGH)
RSS
(
PD N N
C
2
= I
but are not quite high enough to exceed
/
RSS
GATE
(
is the reverse transfer capacitance of
LIMIT(HIGH)
when the low-side switch conducts.
4
1
)
/
=
×
is the peak gate-drive source/sink
3
1
V
is the maximum valley current
switching
+
V
V
(
I
+
MAX
GATE
OUT
+ (LIR / 2 ) x I
(
MAX
)
2
_
)
Rectifier Selection
)
×
=
⎟ ×
f
×
I
LOAD
I
LOAD
LOAD(MAX)
2
×
R
DS
27

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