MAX8550ETI+T Maxim Integrated Products, MAX8550ETI+T Datasheet - Page 22

• Manufacturer Part Number: MAX8550ETI+T
• Description: IC PWR SUP DDR INTEG 28TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX8550ETI+T

• Applications: Controller, DDR
• Voltage - Input: 2 ~ 28 V
• Number Of Outputs: 2
• Voltage - Output: 1.8V, 2.5V, 0.7 ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-TQFN Exposed Pad
• Output Voltage: 0.7 V to 5.5 V, 1.8 V, 2.5 V
• Output Current: 20 A
• Input Voltage: 2 V to 28 V
• Mounting Style: SMD/SMT
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

where I
determined by:
where R
tance (1Ω typ) and R
tance of the MOSFET (≈2Ω):
where V
allow about 20% more for additional losses because of
MOSFET output capacitances and low-side MOSFET
body-diode reverse-recovery charge dissipated in the
high-side MOSFET that is not well defined in the
MOSFET data sheet. Refer to the MOSFET data sheet
for thermal-resistance specifications to calculate the PC
board area needed to maintain the desired maximum
operating junction temperature with the above-calculat-
ed power dissipations. To reduce EMI caused by
switching noise, add a 0.1µF ceramic capacitor from the
high-side switch drain to the low-side switch source, or
add resistors in series with DH and DL to slow down the
switching transitions. Adding series resistors increases
the power dissipation of the MOSFET, so ensure that
this does not overheat the MOSFET.
Fast switching transitions cause ringing because of a
resonating circuit formed by the parasitic inductance
and capacitance at the switching nodes. This high-fre-
quency ringing occurs at LX’s rising and falling transi-
tions and can interfere with circuit performance and
generate EMI. To dampen this ringing, an optional
series RC snubber circuit is added across each switch.
Below is a simple procedure for selecting the value of
the series RC of the snubber circuit:
1) Connect a scope probe to measure V
2) Estimate the circuit parasitic capacitance (C
Integrated DDR Power-Supply Solutions for
Desktops, Notebooks, and Graphic Cards
22
and observe the ringing frequency, f
LX by first finding a capacitor value, which, when
connected from LX to PGND1, reduces the ringing
frequency by half. C
1/3rd the value of the capacitor value found.
P
P
HSSW
HSDR
______________________________________________________________________________________
GATE
GS
DH
= V
=
=
is the high-side MOSFET driver’s on-resis-
I
is the average DH-driver output current
GATE ON
MOSFET Snubber Circuit (Buck)
V
DD
Q
IN
G
= 5V. In addition to the losses above,
(
×
×
I
LOAD
)
V
GATE
GS
PAR
=
R
×
can then be calculated as
DH
×
is the internal gate resis-
f
SW
f
SW
2 5
+
.
R
V
×
×
GATE
R
Q
R
GATE
GS
.
R
LX
I
GATE
GATE
+
to PGND1,
+
Q
R
GD
PAR
DH
) at
3) Estimate the circuit parasitic capacitance (L
4) Calculate the resistor for critical dampening (R
5) The capacitor (C
The power loss of the snubber circuit (P
pated in the resistor and can be calculated as:
where V
frequency. Choose an R
the specific application’s derating rule for the power
dissipation calculated.
The current-sense method used in the MAX8550/
MAX8551 makes use of the on-resistance (R
the low-side MOSFET (Q2 in the Typical Applications
Circuit). When calculating the current limit, use the worst-
case maximum value for R
sheet, and add some margin for the rise in R
temperature. A good general rule is to allow 0.5% addi-
tional resistance for each 1°C of temperature rise.
The minimum current-limit threshold must be great
enough to support the maximum load current when the
current limit is at the minimum tolerance value. The val-
ley of the inductor current occurs at I
half the ripple current; therefore:
where I
threshold voltage divided by the on-resistance of Q2
(R
to AV
threshold is precisely 1/10th* the voltage seen at ILIM.
For an adjustable threshold, connect a resistive divider
from REF to GND with ILIM connected to the center tap.
The external 250mV to 2V adjustment range corresponds
to a 25mV to 200mV valley current-limit threshold. When
adjusting the current limit, use 1% tolerance resistors and
*In the negative direction, the adjustable current limit is typically
-1/8th the voltage seen at ILIM.
DS(ON)Q2
from the equation:
from the equation: R
the resistor value up or down to tailor the desired
damping and the peak voltage excursion.
times the value of C
I
LIM VAL
DD
LIM(VAL)
(
IN
. In adjustable mode, the valley current-limit
P
RSNUB
is the input voltage and f
). For the 50mV default setting, connect ILIM
)
L
>
PAR
Setting the Current Limit (Buck)
I
LOAD MAX
equals the minimum valley current-limit
=
=
C
(
SNUB
(
2
SNUB
PAR
π
SNUB
×
SNUB
DS(ON)
)
f
R
) should be at least 2 to 4
to be effective.
-
)
2
×
⎛
⎜
⎝
1
= 2π × f
I
power rating that meets
LOAD MAX
×
V
IN
from the MOSFET data
C
2
PAR
SW
(
×
LOAD(MAX)
R
2
RSNUB
is the switching
f
x L
SW
)
×
PAR
DS(ON)
DS(ON)
LIR
) is dissi-
. Adjust
⎞
⎟
⎠
SNUB
minus
PAR
with
) of
)
)