LTC3831EGN-1 Linear Technology, LTC3831EGN-1 Datasheet - Page 9
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LTC3831EGN-1
Manufacturer Part Number
LTC3831EGN-1
Description
IC CTRLR SW REG SYNC DDR 16SSOP
Manufacturer
Linear Technology
Datasheet
1.LTC3831EGN-1.pdf
(20 pages)
Specifications of LTC3831EGN-1
Applications
Controller, DDR
Voltage - Input
3 ~ 8 V
Number Of Outputs
1
Voltage - Output
0.4 ~ 4 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Company
Part Number
Manufacturer
Quantity
Price
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APPLICATIO S I FOR ATIO
comparator from triggering due to noise, the MAX
comparator’s response time is deliberately delayed by two
to three microseconds. This comparator helps prevent
extreme output perturbations with fast output load current
transients, while allowing the main feedback loop to be
optimally compensated for stability.
Thermal Shutdown
The LTC3831-1 has a thermal protection circuit that dis-
ables both gate drivers if activated. If the chip junction
temperature reaches 150 C, both TG and BG are pulled
low. TG and BG remain low until the junction temperature
drops below 125 C, after which, the chip resumes normal
operation.
Soft-Start and Current Limit
The LTC3831-1 includes a soft-start circuit that is used for
start-up and current limit operation. The SS pin requires
an external capacitor, CSS, to GND with the value deter-
mined by the required soft-start time. An internal 12 A
current source is included to charge C
up, the COMP pin is clamped to a diode drop (B-E junction
of QSS in the Block Diagram) above the voltage at the SS
pin. This prevents the error amplifier from forcing the loop
to maximum duty cycle. The LTC3831-1 operates at low
duty cycle as the SS pin rises above 0.6V (V
As SS continues to rise, Q
amplifier takes over to regulate the output.
The LTC3831-1 includes yet another feedback loop to
control operation in current limit. Just before every falling
edge of TG, the current comparator, CC, samples and
holds the voltage drop measured across the external
upper MOSFET, Q1, at the I
at I
rises, the measured voltage across Q1 increases due to the
drop across the R
drops below I
exceeded the maximum level, CC starts to pull current out
of C
current level. The CC comparator pulls current out of the
SS pin in proportion to the voltage difference between I
and I
falls gradually, creating a time delay before current limit
FB
SS
MAX
to the voltage at the I
, cutting the duty cycle and controlling the output
. Under minor overload conditions, the SS pin
MAX
, indicating that Q1’s drain current has
DS(ON)
U
of Q1. When the voltage at I
U
FB
MAX
pin. CC compares the voltage
SS
turns off and the error
pin. As the peak current
W
SS
. During power-
COMP
U
1.2V).
FB
FB
takes effect. Very short, mild overloads may not affect the
output voltage at all. More significant overload conditions
allow the SS pin to reach a steady state, and the output
remains at a reduced voltage until the overload is re-
moved. Serious overloads generate a large overdrive at
CC, allowing it to pull SS down quickly and preventing
damage to the output components. By using the R
of Q1 to measure the output current, the current limiting
circuit eliminates an expensive discrete sense resistor that
would otherwise be required. This helps minimize the
number of components in the high current path.
The current limit threshold can be set by connecting an
external resistor R
supply at the drain of Q1. The value of R
by:
where:
The R
keep the current limit threshold constant, the internal
12 A sink current at I
temperature coefficient to provide first order correction
for the temperature coefficient of R
In order for the current limit circuit to operate properly and
to obtain a reasonably accurate current limit threshold, the
I
source pins. In addition, connect a 0.1 F decoupling
capacitor across R
wise, noise spikes or ringing at Q1’s source can cause the
IMAX
R
I
I
I
f
L
R
I
LMAX
LOAD
RIPPLE
OSC
IMAX
O
IMAX
DS(ON)Q1
and I
= Inductor value
DS(ON)
= LTC3831-1 oscillator frequency = 300kHz
= Maximum load current
= Internal 12 A sink current at I
= I
= (I
= Inductor ripple current
FB
LOAD
of Q1 usually increases with temperature. To
LMAX
pins must be Kelvin sensed at Q1’s drain and
= On-resistance of Q1 at I
V
IN
f
OSC
+ (I
–
)(R
IMAX
IMAX
V
RIPPLE
OUT
DS(ON)Q1
L
O
from the I
MAX
to filter switching noise. Other-
/2)
V
V
OUT
IN
is designed with a positive
)/I
IMAX
MAX
DS(ON)Q1
LTC3831-1
pin to the main V
IMAX
LMAX
MAX
is determined
.
DS(ON)
38311f
9
IN