MC33023DWR2G ON Semiconductor, MC33023DWR2G Datasheet - Page 13

IC CTRLR PWM HS SGL ENDED 16SOIC

MC33023DWR2G

Manufacturer Part Number
MC33023DWR2G
Description
IC CTRLR PWM HS SGL ENDED 16SOIC
Manufacturer
ON Semiconductor
Datasheet

Specifications of MC33023DWR2G

Pwm Type
Voltage/Current Mode
Number Of Outputs
1
Frequency - Max
1MHz
Duty Cycle
90%
Voltage - Supply
10 V ~ 30 V
Buck
No
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
Yes
Operating Temperature
-40°C ~ 105°C
Package / Case
16-SOIC (0.300", 7.5mm Width)
Frequency-max
1MHz
Duty Cycle (max)
90 %
Output Voltage
5.05 V to 5.15 V
Output Current
500 mA
Mounting Style
SMD/SMT
Switching Frequency
1000 KHz
Operating Supply Voltage
30 V
Maximum Operating Temperature
+ 105 C
Fall Time
30 ns
Minimum Operating Temperature
- 40 C
Rise Time
30 ns
Synchronous Pin
Yes
Topology
Flyback, Forward
Number Of Pwm Outputs
1
On/off Pin
Yes
Adjustable Output
No
Switching Freq
1MHz
Operating Supply Voltage (max)
30V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
16
Package Type
SOIC W
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
MC33023DWR2GOS

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC33023DWR2G
Quantity:
6 240
resistor from V
information.
Additional dead time can be added by the addition of a dead time
R
T
R
Figure 27. Dead Time Addition
DT
ref
V
ref
to C
C
T
Oscillator
T
. See text on Oscillator section for more
Master
Reference
4
5
6
Figure 29. Current Mode Master/Slave Operation Over Short Distances
Oscillator
Figure 30. Synchronization Over Long Distances
16
4
5
6
Master
Oscillator
C
2200
T
R
430
T
4
5
6
C
1.0 k
4.7 k
T
http://onsemi.com
20
MMBT3904
R
13
T
MMBT3906
MMBD0914
V
need to be set 10% slower than the sync frequency. This circuit is also
used in Voltage Mode operation for master/slave operation. The clock
signal would be coming from the master which is set at the desired
operating frequency, while the slave is set 10% slower.
ref
The sync pulse fed into the clock pin must be at least 3.9 V. R
Figure 28. External Clock Synchronization
5.0 V
4
5
6
0 V
C
T
1.15 R
NC
R
Oscillator
T
T
Slave
4
5
6
C
T
4
5
6
Oscillator
Slave
Oscillator
T
and C
T

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