NCP1396BDR2G ON Semiconductor, NCP1396BDR2G Datasheet - Page 18

IC CTRLR OVP HV 16SOIC

NCP1396BDR2G

Manufacturer Part Number
NCP1396BDR2G
Description
IC CTRLR OVP HV 16SOIC
Manufacturer
ON Semiconductor
Type
High Performance Resonant Mode Controllersr
Datasheet

Specifications of NCP1396BDR2G

Pwm Type
Voltage Mode
Number Of Outputs
1
Frequency - Max
575kHz
Duty Cycle
52%
Voltage - Supply
10.5 V ~ 20 V
Buck
No
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
Yes
Operating Temperature
-40°C ~ 125°C
Package / Case
16-SOIC (3.9mm Width, 15 Leads)
Frequency-max
575kHz
Output Voltage Range
20 V
Output Current
300 uA
Power Dissipation
42 mW
Operating Temperature Range
- 40 C to + 125 C
Mounting Style
SMD/SMT
Input Voltage
12V
Frequency
500kHz
Supply Voltage Range
20V
Digital Ic Case Style
SOIC
No. Of Pins
16
Svhc
No SVHC (15-Dec-2010)
Base Number
1396
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
NCP1396BDR2GOS
NCP1396BDR2GOS
NCP1396BDR2GOSTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
NCP1396BDR2G
Manufacturer:
ON Semiconductor
Quantity:
313
Part Number:
NCP1396BDR2G
0
and un- - validates the AND gates: both outputs are low.
When the comparator goes back to the low level, during the
timing capacitor Ct recharge time, A and B outputs are
validated. By connecting a resistor RDT to ground, it
creates a current whose image serves to discharge the Ct
capacitor: we control the dead- - time. The typical range
evolves between 100 ns (RDT = 3.5 kΩ) and 2 ms (RDT =
83.5 kΩ). Figure 43 shows the typical waveforms.
Soft- -start Sequence
suddenly applying the full current into the resonating
circuit. In this controller, a soft- - start capacitor connects to
pin 1 and offers a smooth frequency variation upon
start- - up: when the circuit starts to pulse, the VCO is pushed
to the maximum switching frequency imposed by pin 2.
Then, it linearly decreases its frequency toward the
minimum frequency selected by a resistor on pin 4. Of
course, practically, the feedback loop is suppose to take
following conditions:
we want to implement skip cycle through the fast fault
input on the NCP1396A, we cannot activate the soft- - start
every time the feedback pin stops the operations in low
power mode. Therefore, when the fast fault pin is released,
- - A startup sequence
- - During auto- - recovery burst mode
- - A brown- - out recovery
- - A temperature shutdown recovery
During the discharge time, the clock comparator is high
In resonant controllers, a soft- - start is needed to avoid
Please note that the soft- - start will be activated in the
The fast fault input undergoes a special treatment. Since
- -10.0
- -20.0
20.0
10.0
177
175
173
171
169
0
Figure 42. A Typical Start- -up Sequence on a LLC Converter
SS
Action
200 m
Target is
Reached
600 m
http://onsemi.com
time in seconds
1.00 m
18
over the VCO lead as soon as the output voltage has reached
the target. If not, then the minimum switching frequency is
reached and a fault is detected on the feedback pin
(typically below 600 mV). Figure 41 depicts a typical
frequency evolution with soft- - start.
no soft- - start occurs to offer the best skip cycle behavior.
However, it is very possible to combine skip cycle and true
fast fault input, e.g. via ORing diodes driving pin 6. In that
case, if a signal maintains the fast fault input high long
enough to bring the feedback level down (that is to say
below 0.6 V) since the output voltage starts to fall down,
then the soft- - start is activated after the release of the pin.
In the B version tailored to operate from an auxiliary 12 V
power supply, the soft- - start is always activated upon the
fast fault input release, whatever the feedback condition is.
Fmax
Fmin
1.40 m
Fsw
Figure 41. Soft- -start Behavior
Soft- -start Duration
1.80 m
Vout
Ires
If no FB
Action
Vss

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