NCP1380CDR2G ON Semiconductor, NCP1380CDR2G Datasheet - Page 17

• Manufacturer Part Number: NCP1380CDR2G
• Description: IC PWM FLYBCK ISO CM 8SOIC
• Manufacturer: ON Semiconductor

Specifications of NCP1380CDR2G

• Pwm Type: Current Mode
• Number Of Outputs: 1
• Frequency - Max: 65kHz
• Voltage - Supply: 9.4 V ~ 28 V
• Buck: No
• Boost: No
• Flyback: Yes
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: Yes
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 8-SOIC (3.9mm Width)
• Frequency-max: 65kHz
• Mounting Style: SMD/SMT
• Operating Supply Voltage: - 0.3 V to + 28 V
• Supply Current: +/- 30 mA
• Maximum Operating Temperature: + 125 C
• Fall Time: 25 ns
• Minimum Operating Temperature: - 40 C
• Rise Time: 40 ns
• Synchronous Pin: No
• Topology: Quasi-Resonant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Duty Cycle: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Time Out
comparator can be unable to detect the valleys. To avoid
such situation, NCP1380 integrates a Time Out function that
acts as a substitute clock for the decimal counter inside the
logic bloc. The controller thus continues its normal
operation. To avoid having a too big step in frequency, the
time out duration is set to 5.5 ms. Figures 34 and 35 detail the
time out operation.
the soft−start.
auxiliary winding is low. Because of the voltage drop
In case of extremely damped free oscillations, the ZCD
The NCP1380 also features an extended time out during
Indeed, at startup, the output voltage reflected on the
Figure 32. Zoom 4: 4
Figure 31. Zoom 3: 3
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Valley to VCO Mode Transition
rd
17
to 4
introduced by the Over Power Compensation diode
(Figure 40), the voltage on the ZCD pin is very low and the
ZCD comparator might be unable to detect the valleys. In
this condition, setting the DRV Latch with the 5.5 ms
time−out can lead to a continuous conduction mode
operation (CCM) at the beginning of the soft−start. This
CCM operation only last a few cycles until the voltage on
ZCD pin becomes high enough to be detected by the ZCD
comparator. To avoid this, the time−out duration is extended
to 40 ms during the soft−start in order to ensure that the
transformer is fully demagnetized before the MOSFET is
turned−on.
th
Valley Transition